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Z85C3016PSG Datasheet(PDF) 10 Page - Zilog, Inc. |
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Z85C3016PSG Datasheet(HTML) 10 Page - Zilog, Inc. |
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10 / 83 page  PS011707-1013 Overview CMOS SCC Serial Communications Controller Product Specification 2 • New programmable Write Register 7 prime (WR7) to enable new features • Improvements to support the SDLC mode of synchronous communication: – Improve functionality to ease sending back-to-back frames – Automatic SDLC opening Flag transmission – Automatic Tx Underrun/EOM Latch reset in SDLC Mode – Automatic RTS deactivation – TxD pin forced High in SDLC NRZI Mode after closing flag – Complete CRC reception – Improved response to Abort sequence in status FIFO – Automatic Tx CRC generator preset/reset – Extended read for write registers – Write data set-up timing improvement • Improved AC timing: – 3 to 3.6 PCLK access recovery time – Programmable DTR/REQ timing – Write data to falling edge of WR setup time requirement is now eliminated – Reduced INT timing • Other features include: – Extended read function to read back the written value to the write registers – Latching RRO during read – RRO, bit D7 and RR10, bit D6 now has reset default value |
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