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HT49C50 Datasheet(PDF) 11 Page - Holtek Semiconductor Inc |
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HT49C50 Datasheet(HTML) 11 Page - Holtek Semiconductor Inc |
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11 / 52 page  HT49C50 11 August 18, 1999 · Location 014H Location 014H is reserved for the Time Base interrupt service program. If a Time Base in- terrupt occurs, and the interrupt is enabled, and the stack is not full, the program begins execution at location 014H. · Location 018H Location 018H is reserved for the real time clock interrupt service program. If a real time clock interrupt occurs, and the interrupt is enabled, and the stack is not full, the program begins execution at location 018H. · Table location Any location in the ROM can be used as a look-up table. The instructions ²TABRDC [m]² (the current page, 1 page=256 words) and ²TABRDL [m]² (the last page) transfer the contents of the lower-order byte to the specified data memory, and the contents of the higher-order byte to TBLH (Table Higher-order byte register) (08H). Only the destination of the lower-order byte in the ta- ble is well-defined; the other bits of the table word are all transferred to the lower portion of TBLH, and the remaining 1 bit is read as ²0². The TBLH is read only, and the table pointer (TBLP) is a read/write register (07H), indicating the table location. Before accessing the table, the location should be placed in TBLP. All the table related instructions re- quire 2 cycles to complete the operation. These areas may function as a normal ROM depending upon the user¢s requirements. Stack register - STACK The stack register is a special part of the mem- ory used to save the contents of the PC. The stack is organized into 6 levels and is neither part of the data nor part of the program, and is neither readable nor writeable. Its activated level is indexed by a stack pointer (SP) and is neither readable nor writeable. At a commence- ment of a subroutine call or an interrupt ac- knowledgment, the contents of the PC is pushed onto the stack. At the end of the subrou- tine or interrupt routine, signaled by a return instruction (RET or RETI), the contents of the PC is restored to its previous value from the stack. After chip reset, the SP will point to the top of the stack. If the stack is full and a non-masked interrupt takes place, the interrupt request flag is re- corded but the acknowledgment is still inhib- ited. Once the SP is decremented (by RET or RETI), the interrupt is serviced. This feature prevents stack overflow, allowing the program- mer to use the structure easily. Likewise, if the stack is full, and a ²CALL² is subsequently exe- cuted, a stack overflow occurs and the first en- try is lost (only the most recent six return addresses are stored). Data memory - RAM The data memory (RAM) is designed with 192´8 bits, and is divided into two functional groups, namely special function registers and general purpose data memory, most of which are readable/writeable, although some are read only. Instruction(s) Table Location *11 *10 *9 *8 *7 *6 *5 *4 *3 *2 *1 *0 TABRDC [m] P11 P10 P9 P8 @7 @6 @5 @4 @3 @2 @1 @0 TABRDL [m] 1 1 1 1 @7 @6 @5 @4 @3 @2 @1 @0 Table location Notes: *11~*0: Table location bits @7~@0: Table pointer bits P11~P8: Current program Counter bits |
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