HI-8050/51, HI-8150/51

HI-8051& HI-8151 PIN CONFIGURATIONS

(See page 3-27 for the HI-8050& HI-8150 pin configurations)

LD

DIN

BPIN

BPOSC

VDD

S37

S38

S1

S2

S3

S4

S5

S6

S26

S25

S24

S23

S22

S21

S20

DOUT 38

N/C

T2

T1

BPOUT

S19

39

38

37

36

35

34

33

32

31

30

29

28

27

1

2

3

4

5

6

7

8

9

10

11

12

13

HI-8051PQI

HI-8151PQI

HI-8051PQT

&

HI-8151PQT

VDD =

, VEE= -25V, VSS= 0V, TA= operating temperature range (unless otherwise specified).

5V ±5%

PARAMETER

SYMBOL

VDD

MIN

TYP

MAX

UNITS

Clock Period

non-cascaded

t

5V

250

ns

cascaded

t

5V

500

ns

Clock Pulse Width

non-cascaded

t

5V

125

ns

cascaded

t

5V

250

ns

Data In- Setup

t

5V

80

ns

Data In- Hold

t

5V

80

ns

Chip Select- Setup to Clock

t

5V

100

ns

Chip Select- Hold to Clock

t

5V

120

ns

Load- Setup to Clock

t

5V

120

ns

Chip Select- Setup to Load

t

5V

0

ns

Load Pulse Width

t

5V

130

ns

Chip Select- Hold to Load

t

5V

120

ns

Data Out Valid, from Clock

t

5V

170

ns

CL

CL

CW

CW

DS

DH

CSS

CSH

CSL

LW

LCS

CDO

LS

HOLT INTEGRATED CIRCUITS

6