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HI-1568CDT Datasheet(PDF) 2 Page - Holt Integrated Circuits |
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HI-1568CDT Datasheet(HTML) 2 Page - Holt Integrated Circuits |
2 / 7 page HI-1567, HI-1568 PIN DESCRIPTIONS FUNCTIONAL DESCRIPTION PIN SYMBOL FUNCTION DESCRIPTION 1 VDDA power supply +5 volt power for channel A 2 BUSA analog output MIL-STD-1533 bus driver A, positive signal 3 analog output MIL-STD-1553 bus driver A, negative signal 4 RXENA digital input ReceiverA enable. If low, forces RXA and low (HI-1567) or High (HI-1568) 5 GNDA power supply Ground for channel A 6 VDDB 7 BUSB 9 RXENB 10 GNDB 11 12 RXB digital output ReceiverB outpot, non-invertedl 13 TXINHB digital input Transmit inhibit, channel B. If high BUSB, disabled 14 TXB digital input TransmitterB digital data input, non-inverted 15 digital input TransmitterB digital data input, inverted 16 digital output BUSA RXA BUSB TXB RXA power supply +5 volt power for channel B analog output MIL-STD-1533 bus driver B, positive signal 8 analog output MIL-STD-1553 bus driver B, negative signal digital input ReceiverB enable. If low, forces RXB and low (HI-1567) or High (HI-1568) power supply Ground for channel B digital output ReceiverB output, inverted ReceiverA output, inverted 17 RXA digital output ReceiverA output, non-inverted 18 TXINHA digital input Transmit inhibit, channel A. If high BUSA, disabled 19 TXA digital input TransmitterA digital data input, non-inverted 15 digital input TransmitterA digital data input, inverted BUSB RXB RXB BUSA TXA The HI-1567 family of data bus transceivers contain differ- ential voltage source drivers and differential receivers. They are intended for applications usinga MIL-STD-1553 A/B data bus. The device producesa trapezoidal output waveform during transmission. Data input to the transmitter section of these devices is from the complimentary CMOS /TTL inputs TXA/B and . This producesa nominal 30V peak to peak signal acrossa 140 ohm load. The transmitter is connected to the bus viaa 1:2.5 transformer whose secondary is connected to two 52 ohm isolation resisters which feed the terminated 70 ohm bus. This will producea nominal voltage on the bus of 7.5 volts peak to peak. TRANSMITTER TXA/B The transmitter is automatically inhibited and placed in the high impedance state when both TXA/B and are ei- ther ata logic “1” or logic “0” simultaneously.A logic “1:” ap- plied to the TXINHA/B input will force the transmitter to the high impedance state, regardless of the state of TXA/B and The receiver outputs can both be forced toa logic "0" (HI-1567) or logic “1” (HI-1568) by setting RXENA or RXENB low. TXA/B TXA/B RECEIVER The receiver is transformer coupled to the bus bya 1:1 transformer. Its differential input stage drivesa filter and threshold comparator. CMOS/TTL data is outputted at the RXA/B and pins. RXA/B HOLT INTEGRATED CIRCUITS 2 |
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