Figure2 showsa possible application

of the HI-8585/86 interfacing an ARINC

transmit channel from the HI-6010.

8

HI-8585, HI-8586

FUNCTIONAL DESCRIPTION

TXAOUT

CURRENT

CONTROL

-5V

5V

ONE

NULL

ZERO

CONTROL

LOGIC

TXBOUT

CURRENT

CONTROL

-5V

5V

SLP1.5

ESD

PROTECTION

AND

VOLTAGE

TRANSLATION

FIGURE 1- LINE DRIVER BLOCK DIAGRAM

HI-8585= 37.5 OHMS

HI-8586= 10.0 OHMS

HI-8585= 37.5 OHMS

HI-8556= 10.0 OHMS

ONE

NULL

ZERO

CONTROL

LOGIC

1

2

8

6

7

4

3

4

5

6

7

2

3

FIGURE 2- APPLICATION DIAGRAM

APPLICATION INFORMATION

1

5

Figure1 isa block diagram of the line driver. The +5V and

-5V levels are generated internally using on-chip zeners.

Currents for slope control are set by zener voltages across

on-chip resistors.

The TX0IN and TX1IN inputs receive logic signals from a

control transmitter chip such as the HI-6010 or HI-8282.

TXAOUT and TXBOUT hold each side of the ARINC bus at

Ground until one of the inputs becomesa One. If for exam-

ple TX1IN goes high,a charging path is enabled to 5V on an

“A” side internal capacitor while the “B” side is enabled to

-5V. The charging current is selected by the SLP1.5 pin. If

the SLP1.5 pin is high, the capacitor is nominally charged

from 10% to 90% in 1.5µs. If SLP1.5 is low, the rise and fall

times are 10µs.

A unity gain buffer receives the internally generated slopes

and differentially drives the ARINC line. Current is limited

by the series output resistors at each pin. There are no

fuses at the outputs of the HI-8585 as exists on the HI-8382.

The HI-8585 has 37.5 ohms in series with each output. The

HI-8586 has 10 ohms in series. The HI-8586 is for applica-

tions where more series resistance is added externally,

typically for lightning protection devices.

HOLT INTEGRATED CIRCUITS

2

“A” SIDE

“B” SIDE