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1348FS–ATARM–13-Apr-06

AT91M40800

8.4

System Peripherals

8.4.1

PS: Power-saving

The Power-saving feature optimizes power consumption, enabling the software to stop the

ARM7TDMI clock (idle mode), restarting it when the module receives an interrupt (or reset). It

also enables on-chip peripheral clocks to be enabled and disabled individually, matching power

consumption and application need.

8.4.2

AIC: Advanced Interrupt Controller

The Advanced Interrupt Controller has an 8-level priority, individually maskable, vectored inter-

rupt controller, and drives the NIRQ and NFIQ pins of the ARM7TDMI from:

• The external fast interrupt line (FIQ)

• The three external interrupt request lines (IRQ0 - IRQ2)

• The interrupt signals from the on-chip peripherals.

The AIC is largely programmable offering maximum flexibility, and its vectoring features reduce

the real-time overhead in handling interrupts.

The AIC also features a spurious vector, which reduces spurious interrupt handling to a mini-

mum, and a protect mode that facilitates the debug capabilities.

8.4.3

PIO: Parallel I/O Controller

The AT91M40800 microcontroller has 32 programmable I/O lines. Six pins are dedicated as

general-purpose I/O pins. Other I/O lines are multiplexed with an external signal of a peripheral

to optimize the use of available package pins. The PIO controller enables generation of an inter-

rupt on input change and insertion of a simple input glitch filter on any of the PIO pins.

8.4.4

WD: Watchdog

The Watchdog is built around a 16-bit counter and is used to prevent system lock-up if the soft-

ware becomes trapped in a deadlock. It can generate an internal reset or interrupt, or assert an

active level on the dedicated pin NWDOVF. All programming registers are password-protected

to prevent unintentional programming.

8.4.5

SF: Special Function

The AT91M40800 microcontroller provides registers that implement the following special

functions.

• Chip identification

• RESET status

• Protect mode