ATA8201/ATA8202 [DATASHEET]

4971G–INDCO–09/14

6

2.

RF Receiver

As seen in Figure 1-3 on page 5, the RF receiver consists of a low-noise amplifier (LNA), a local oscillator, and the signal

processing part with mixer, IF filter, IF amplifier with analog RSSI, FSK/ASK demodulator, data filter, and data slicer.

In receive mode, the LNA pre-amplifies the received signal which is converted down to a 440-kHz intermediate frequency

(IF), then filtered and amplified before it is fed into an FSK/ASK demodulator, data filter, and data slicer. The received signal

strength indicator (RSSI) signal is available at the pin RSSI.

2.1

Low-IF Receiver

The receive path consists of a fully integrated low-IF receiver. It fulfills the sensitivity, blocking, selectivity, supply voltage,

and supply current specification needed to design, e.g., an industrial/ aftermarket integrated receiver for RKE and TPM

systems. A benefit of the integrated receive filter is that no external components needed.

6.0dB (7.0dB), a system I1dBCP of –31dBm (–30dBm), and a system IIP3 of –24dBm (–23dBm). The signal path is linear for

out-of-band disturbers up to the I1dBCP and hence there is no AGC or switching of the LNA needed, and a better blocking

performance is achieved. This receiver uses an IF (intermediate frequency) of 440kHz, the typical image rejection is 30dB

demodulator needs a signal-to-noise ratio of 8.5dB for 10Kbits/s Manchester with ±38kHz frequency deviation in FSK mode,

thus, the resulting sensitivity at 315MHz (433.92MHz) is typically –105dBm (–104dBm).

Due to the low phase noise and spurs of the synthesizer together with the 8th-order integrated IF filter, the receiver has a

better selectivity and blocking performance than more complex double superhet receivers, without using external

components and without numerous spurious receiving frequencies.

A low-IF architecture is also less sensitive to second-order intermodulation (IIP2) than direct conversion receivers where

every pulse or amplitude modulated signal (especially the signals from TDMA systems like GSM) demodulates to the

receiving signal band at second-order non-linearities.

2.2

Input Matching at LNA_IN

The measured input impedances as well as the values of a parallel equivalent circuit of these impedances can be seen in

Table 2-1. The highest sensitivity is achieved with power matching of these impedances to the source impedance.

The matching of the LNA input to 50

Ω is done using the circuit shown in Figure 2-1 and the values of the matching elements

given in Table 2-2. The reflection coefficients were always ≤ –10dB. Note that value changes of C1 and L1 may be

necessary to compensate individual board layout parasitics. The measured typical FSK and ASK Manchester-code

done with wire-wound inductors having quality factors reported in Table 2-2, resulting in estimated matching losses of 0.8dB

at 315MHz and 433.92MHz. These losses can be estimated when calculating the parallel equivalent resistance of the

Figure 2-1. Input Matching to 50

Ω

Table 2-1.

Measured Input Impedances of the LNA_IN Pin

315

(72.4 – j298)

1300

Ω//1.60

433.92

(55 – j216)

Ω

900

Ω//1.60

14

C1

L1

LNA_IN

ATA8201/ATA8202