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ATA6612C Datasheet(PDF) 9 Page - ATMEL Corporation |
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ATA6612C Datasheet(HTML) 9 Page - ATMEL Corporation |
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9 / 312 page  9 ATA6612C/ATA6613C [DATASHEET] 9111L–AUTO–11/14 3.3 Functional Description 3.3.1 Physical Layer Compatibility Since the LIN physical layer is independent from higher LIN layers (e.g., the LIN protocol layer), all nodes with a LIN physical layer according to revision 2.x can be mixed with LIN physical layer nodes, which are according to older versions (i.e., LIN 1.0, LIN 1.1, LIN 1.2, LIN 1.3), without any restrictions. 3.3.2 Supply Pin (VS) The LIN operating voltage is VS = 5V to 27V. An under voltage detection is implemented to disable data transmission if VS falls below VSth < 4V in order to avoid false bus messages. After switching on VS, the IC starts in fail-safe mode, and the voltage regulator is switched on (i.e., output capability). The supply current is typically 10µA in sleep mode and 57µA in silent mode. 3.3.3 Ground Pin (GND) The IC does not affect the LIN bus in the event of GND disconnection. It is able to handle a ground shift up to 11.5% of versus The mandatory system ground is pin 5. 3.3.4 Voltage Regulator Output Pin (VCC) The internal voltage regulator is capable of driving loads with up to 85mA. It is able to supply the microcontroller and other ICs on the PCB and is protected against overloads by means of current limitation and over temperature shut-down. Furthermore, the output voltage is monitored and will cause a reset signal at the NRES output pin if it drops below a defined threshold Vthun. To boost up the maximum load current, an external NPN transistor may be used, with its base connected to the VCC pin and its emitter connected to PVCC. 3.3.5 Voltage Regulator Sense Pin (PVCC) The PVCC is the sense input pin of the voltage regulator. For normal applications (i.e., when only using the internal output transistor), this pin is connected to the VCC pin. If an external boosting transistor is used, the PVCC pin must be connected to the output of this transistor, i.e., its emitter terminal. 3.3.6 Bus Pin (LIN) A low-side driver with internal current limitation and thermal shutdown and an internal pull-up resistor compliant with the LIN 2.x specification are implemented. The allowed voltage range is between –27V and +40V. Reverse currents from the LIN bus to VS are suppressed, even in the event of GND shifts or battery disconnection. LIN receiver thresholds are compatible with the LIN protocol specification. The fall time from recessive to dominant bus state and the rise time from dominant to recessive bus state are slope controlled. 3.3.7 Input/Output Pin (TXD) In normal mode the TXD pin is the microcontroller interface used to control the state of the LIN output. TXD must be pulled to ground in order to have a low LIN-bus. If TXD is high or unconnected (internal pull-up resistor), the LIN output transistor is turned off, and the bus is in recessive state. During fail-safe mode, this pin is used as output. It is current-limited to < 8mA. and is latched to low if the last wake-up event was from pin WAKE or KL_15. 3.3.8 TXD Dominant Time-out Function The TXD input has an internal pull-up resistor. An internal timer prevents the bus line from being driven permanently in dominant state. If TXD is forced to low for longer than tDOM > 6ms, the LIN-bus driver is switched to recessive state. To reactivate the LIN bus driver, switch TXD to high (>10µs). 3.3.9 Output Pin (RXD) The output pin reports the state of the LIN-bus to the microcontroller. LIN high (recessive state) is reported by a high level at RXD; LIN low (dominant state) is reported by a low level at RXD. The output has an internal pull-up resistor with typically 5k Ω to VCC. The AC characteristics can be defined with an external load capacitor of 20pF. The output is short-circuit protected. RXD is switched off in Unpowered mode (i.e., VS = 0V). |
Similar Part No. - ATA6612C_14 |
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Similar Description - ATA6612C_14 |
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