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AT24C08SC Datasheet(PDF) 5 Page - ATMEL Corporation |
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AT24C08SC Datasheet(HTML) 5 Page - ATMEL Corporation |
5 / 14 page 5 AT24C01ASC/02SC/04SC/08SC/16SC 1610B–SEEPR–04/04 Timing Diagrams Bus Timing Figure 1. Bus Timing Note: SCL: Serial Clock, SDA: Serial Data I/O Write Cycle Timing Figure 2. Write Cycle Timing Notes: 1. The write cycle time t WR is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle. 2. SCL: Serial Clock, SDA: Serial Data I/O Data Validity Figure 3. Data Validity tWR(1) SDA SCL DATA STABLE DATA CHANGE DATA STABLE |
Similar Part No. - AT24C08SC_14 |
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Similar Description - AT24C08SC_14 |
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