© 2002 Fairchild Semiconductor Corporation

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LM555 Rev. 1.1.0

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3. Frequency Divider

By adjusting the length of the timing cycle, the basic circuit of Figure 1 can be made to operate as a frequency divider.

Figure 9. illustrates a divide-by-three circuit that makes use of the fact that retriggering cannot occur during the timing

cycle.

4. Pulse Width Modulation

The timer output waveform may be changed by modulating the control voltage applied to the timer's pin 5 and chang-

ing the reference of the timer's internal comparators. Figure 10 illustrates the pulse width modulation circuit.

When the continuous trigger pulse train is applied in the monostable mode, the timer output width is modulated accord-

ing to the signal applied to the control terminal. Sine wave, as well as other waveforms, may be applied as a signal to

the control terminal. Figure 11 shows the example of pulse width modulation waveform.

Figure 9. Waveforms of Frequency Divider Operation

Figure 10. Circuit for Pulse Width Modulation

Figure 11. Waveforms of Pulse Width Modulation

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4

7

1

2

3

5

6

CONT

GND

Vcc

DISCH

THRES

RESET

TRIG

OUT

+Vcc

Trigger

R

A

C

Output

Input