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GDC21D601 Datasheet(PDF) 5 Page - Hynix Semiconductor |
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GDC21D601 Datasheet(HTML) 5 Page - Hynix Semiconductor |
5 / 189 page 6 GDC21D601 Section 12. General Purpose Timer Unit ................................................................................. 96 1. General Description ............................................................................................................ 96 2. Hardware Interface and Signal Description ........................................................................ 97 3. General Purpose Timer Unit Introduction ......................................................................... 100 4. General Purpose Timer Unit Operation ............................................................................ 101 5. General Purpose Timer Unit Memory Map ....................................................................... 102 6. General Purpose Timer Unit Register Descriptions.......................................................... 104 7. Examples of Register Setting............................................................................................ 108 Section 13. PIO ......................................................................................................................... 111 1. General Description .......................................................................................................... 111 2. Signal Description ............................................................................................................. 112 3. Hardware Interface ........................................................................................................... 115 4. Functional Description ...................................................................................................... 116 5. Programmer’ s Model........................................................................................................ 117 Section 14. Synchronous Serial Peripheral Interface........................................................... 118 1. General Description .......................................................................................................... 118 2. Signal Description ............................................................................................................. 119 3. Hardware Interface ........................................................................................................... 120 4. Functional Description ...................................................................................................... 121 5. Register Memory Map....................................................................................................... 123 6. SSPI Data Clock Timing Diagram..................................................................................... 124 Section 15. UART ..................................................................................................................... 125 1. General Description .......................................................................................................... 125 2. Features............................................................................................................................ 125 3. Signal Description ............................................................................................................. 126 4. Internal Block Diagram...................................................................................................... 129 5. Registers Description........................................................................................................ 130 Section 16. Smart Card Interface............................................................................................ 142 1. General Description .......................................................................................................... 142 2. Signal Description ............................................................................................................. 143 3. Hardware Interface ........................................................................................................... 144 4. Functional Description ...................................................................................................... 145 5. Programmer’ s Model........................................................................................................ 146 |
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