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GMS81004 Datasheet(PDF) 3 Page - Hynix Semiconductor |
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GMS81004 Datasheet(HTML) 3 Page - Hynix Semiconductor |
3 / 101 page Table of Contents Table of Contents Chapter 1 Overview 1.1 Features & Pin Assignments . . . . . . . . . . . . . . . . . . . . . 1-1 1.2 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.3 Package Dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3 1.4 Pin Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5 1.5 Port Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6 1.6 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 1-10 Chapter 2 Function Description 2.1 Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1 2.2 Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6 2.3 TCALL Vector Area . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7 2.4 Zero-Page Peripheral Registers . . . . . . . . . . . . . . . . . . . 2-8 Chapter 3 I/O PORT 3.1 Port R0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1 3.2 Port R1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2 3.3 Port R2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2 Chapter 4 Peripheral Hardware 4.1 Clock Generating Circuit . . . . . . . . . . . . . . . . . . . . . . . . . 4-1 4.2 Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-10 |
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