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ATAR090-D Datasheet(PDF) 10 Page - ATMEL Corporation |
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ATAR090-D Datasheet(HTML) 10 Page - ATMEL Corporation |
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10 / 70 page  10 ATAR090-D 4701C–4BMCU–12/04 Master Reset The master reset forces the CPU into a well-defined condition. It is unmaskable and is activated independent of the current program state. It can be triggered by either initial supply power-up, a short collapse of the power supply, the brown-out detection circuitry, a watchdog time-out, or an external input clock supervisor stage (see Figure 9). A master reset activation will reset the interrupt enable flag, the interrupt pending regis- ter and the interrupt active register. During the power-on reset phase the I/O bus control signals are set to reset mode thereby initializing all on-chip peripherals. All bi-directional ports are set to input mode. Attention: During any reset phase, the BP20/NTE input is driven towards V DD by an additional internal strong pull-up transistor. This pin must not be pulled down to V SS dur- ing reset by any external circuitry representing a resistor of less than 150 k Ω. Releasing the reset results in a short call instruction (opcode C1h) to the ROM address 008h. This activates the initialization routine $RESET which in turn has to initialize all necessary RAM variables, stack pointers and peripheral configuration registers. Figure 9. Reset Configuration Power-on Reset and Brown-out Detection The ATAR090-D has a fully integrated power-on reset and brown-out detection circuitry. For reset generation no external components are needed. These circuits ensure that the core is held in the reset state until the minimum operating supply voltage has been reached. A reset condition will also be generated should the supply voltage drop momentarily below the minimum operating level except when a power down mode is activated (the core is in SLEEP mode and the peripheral clock is stopped). In this power-down mode the brown-out detection is disabled. Two values for the brown-out voltage threshold are programmable via the BOT bit in the SC register. Reset timer V DD CL Power-on reset Internal reset res CL = SYSCL/4 Brown-out detection Watch- dog CWD res Ext. clock supervisor ExIn Pull-up NRST V DD V SS V DD V SS |
Similar Part No. - ATAR090-D_14 |
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Similar Description - ATAR090-D_14 |
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