HY29F040AP-70E datasheet(11/40 Pages) HYNIX

Part #	HY29F040AP-70E

Description	512K x 8-bit CMOS 5.0 volt-only, Sector Erase Flash Memory

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Manufacturer	HYNIX [Hynix Semiconductor]

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HY29F040A

DQ7

/Data Polling

The HY29F040A device features /Data Polling as

a method to indicate to the host the status of the

Byte Programming, Chip Erase, and Sector Erase

operations. When the Byte Programming opera-

tion is in progress, an attempt to read the device

will produce the compliment of the data last writ-

ten to DQ7. Upon completion of the Byte Program-

ming operation, an attempt to read the device will

produce the true data last written to DQ7. When

the Chip Erase or Sector Erase operation is in

progress, an attempt to read the device will produce

a logical “0” at the DQ7 output. Upon completion of

the Chip Erase or Sector Erase operation, an at-

tempt to read the device will produce a logical ”1" at

the DQ7 output. The flowchart for /Data Polling (DQ7)

is shown in Figure 3.

For Chip Erase, the /Data Polling is valid after the

rising edge of the sixth /WE pulse in the six write

pulse sequence. For Sector Erase, the /Data Poll-

ing is valid after the last rising edge of the sector

erase /WE pulse. For both Chip Erase and Sec-

tor Erase, /Data Polling must be performed at sec-

tor address within any of the sectors being erased

and not a protected sector. Otherwise, the /Data

Polling status may not be valid. Once the Internal

Algorithm operation is close to being completed,

the HY29F040A data pins (DQ7) may change asyn-

chronously while the output enable (/OE) is as-

serted low. This means that the device is driving sta-

tus information on DQ7 at one instant of time and

valid data at the next instant of time. Depending on

when the system samples the DQ7 output, it may

read the status or valid data. Even if the device has

completed the Internal Algorithm operation and DQ7

has a valid data, data outputs on DQ0-DQ6 may be

still invalid. Valid data on DQ0-DQ7 will be read on

successive read attempts.

The Data Polling feature is only active during the

Byte Programming operation, Chip Erase

operation, Sector Erase Operation, or sector

erase time-out window (see Table 5).

DQ6

Toggle Bit

The HY29F040A also features the “Toggle Bit”

as a method to indicate to the host system the

status of the Internal Programming and Erase

Algorithms. The flowchart for Toggle Bit (DQ6) is

shown in Figure 4.

During an Internal Programming or Erase Algorithm

cycle, successive attempts to read (/OE toggling)

data from the device will result in DQ6 toggling

between one and zero. Once the Internal Pro-

gramming or Erase operation is completed, DQ6

will stop toggling and valid data will be read on the

WRITE OPERATION STATUS

Notes:

1. DQ0, DQ1, DQ2, DQ4 are reserve pins for future use.

Table 5. Write Operation Status Flags

(1)

Status

DQ7

DQ6

DQ5

DQ3

Byte Programming Operation

/DQ7

Toggle

0

In Progress

Chip or Sector Erase Operation

0

Toggle

0

1

Erase Suspend

Erase Suspended Sector

1

No Toggle

0

N/A

Mode

Non-Erase Suspended Sector

Data

Exceeded

Byte Programming Operation

/DQ7

Toggle

1

0

Time Limits

Chip or Sector Erase Operation

0

Toggle

1

Program in Erase Suspend Mode

/DQ7

Toggle

1

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