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ICS552-03 Datasheet(PDF) 1 Page - Integrated Circuit Systems |
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ICS552-03 Datasheet(HTML) 1 Page - Integrated Circuit Systems |
1 / 6 page ICS552-03 MDS 552-03 B 1 Revision 052501 In tegr ated C i r cu i t S y st ems q 5 25 Ra ce Str eet, San Jose, C A 95 126 q tel ( 408) 2 95-9 800 q w w w.ic s t .c o m LOW SKEW 1 TO 8 CLOCK BUFFER (4 AT 1X, 4 AT 1/2X) Description The ICS552-03 is a low skew, single input to eight output clock buffer. Four of the outputs are exact copies of the input, while the other four are divide by 2 copies of the input. It is part of ICS’ Clock BlocksTM family. See the ICS553 for a 1 to 4 low skew buffer, or the ICS552-02 for a 1 to 8 low skew buffer without divide by 2. For more than 8 outputs see the MK74CBxxx BuffaloTM series of clock drivers. ICS makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact us for all of your clocking needs. Features • Low skew outputs (50 ps maximum) • Packaged in 16 pin TSSOP • Low power CMOS technology • Operating Voltages of 2.5 V to 5 V • Output Enable pin tri-states outputs • Low skew between 1X and 1/2X outputs (100 ps maximum) • One bank of 4 outputs at 1X • One bank of 4 outputs at 1/2X • 5V tolerant input clocks • Input clock multiplexer Block Diagram OE Q3 P0 Q2 P1 P2 Q1 Q0 P3 IN A IN B 1 0 SE L A Divid e by 2 |
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