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ICS8737AG-11 Datasheet(PDF) 10 Page - Integrated Circuit Systems

Part # ICS8737AG-11
Description  LOW SKEW 첨1/첨2 DIFFERENTIAL-TO- 3.3V LVPECL CLOCK GENERATOR
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Manufacturer  ICST [Integrated Circuit Systems]
Direct Link  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS8737AG-11 Datasheet(HTML) 10 Page - Integrated Circuit Systems

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8737AG-11
www.icst.com/products/hiperclocks.html
REV. A JULY 13, 2001
10
Integrated
Circuit
Systems, Inc.
ICS8737-11
LOW SKEW
÷÷÷÷÷1/÷÷÷÷÷2
DIFFERENTIAL-TO- 3.3V LVPECL CLOCK GENERATOR
3. Calculations and Equations.
LVPECL output driver circuit and termination are shown in
Figure 10.
To calculate worst case power dissipation into the load, use the following equations which assume a 50
Ω load, and a termination
voltage of V
CC
- 2V.
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
Pd_H = [(V
OH_MAX
– (V
CC_MAX
- 2V))/R
L
] * (V
CC_MAX
- V
OH_MAX
)
Pd_L = [(V
OL_MAX
– (V
CC_MAX
- 2V))/R
L
] * (V
CC_MAX
- V
OL_MAX
)
• For logic high, V
OUT
= V
OH_MAX
= V
CC_MAX
– 1.0V
Using V
CC_MAX
= 3.465, this results in V
OH_MAX
= 2.465V
• For logic low, V
OUT
= V
OL_MAX
= V
CC_MAX
– 1.7V
Using V
CC_MAX
= 3.465, this results in V
OL_MAX
= 1.765V
Pd_H = [(2.465V - (3.465V - 2V))/50
Ω] * (3.465V - 2.465V) = 20.0mW
Pd_L = [(1.765V - (3.465V - 2V))/50
Ω] * (3.465V - 1.765V) = 10.2mW
Total Power Dissipation per output pair = Pd_H + Pd_L = 30.2mW
FIGURE 10 - LVPECL DRIVER CIRCUIT AND TERMINATION
Q1
V
OUT
V
CC
RL
50
V
CC - 2V


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