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MK1491-06 Datasheet(PDF) 2 Page - Integrated Circuit Systems

Part # MK1491-06
Description  CS5530 Geode??Clock Source
Download  6 Pages
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Manufacturer  ICST [Integrated Circuit Systems]
Direct Link  http://www.icst.com
Logo ICST - Integrated Circuit Systems

MK1491-06 Datasheet(HTML) 2 Page - Integrated Circuit Systems

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MK1491-06
CS5530 Geode Clock Source
MDS 1491-06 F
2
Revision 101700
Printed 11/15/00
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose • CA • 95126 • (408)295-9800tel • www.icst.com
Pin #
Name
Type Description
1, 9, 14
VDD
P
Connect to +3.3V. Must be same voltage on all pins.
2
XI
I
Crystal connection. Connect to a 14.31818 MHz crystal or input clock.
3
XO
O
Crystal connection. Connect to a 14.31818 MHz crystal, or leave unconnected for clock.
4, 7, 11, 17, 23
GND
P
Connect to Ground.
5
14.3M(TS)
TI/O 14.318 MHz output. Input control for all clocks per table above.
6
14.3M
O
14.318 MHz buffered reference clock output.
8
14.3M(SEL AUDIO) TI/O 14.318 MHz output and audio frequency select input per table above.
10
SLOW#
I
PCI normal or slow mode select input per table on page 4.
12
FS
I
Frequency Select for PCI clocks per table above.
13
SEL24
I
Fixed frequency select input per table above. Selects frequency on pin 19.
15
PWRDWN#
I
Power down control; defined in table on page 4.
16
PCISTP#
I
PCI Stop power down control; defined in table on page 4.
18, 20, 26
VDD
P
Connect to +3.3V. Must be same voltage on all pins.
19
24M/14.3M
O
Fixed frequency clock output per table above.
21
48(LE#)
I/O
Fixed frequency clock output and low EMI (spread spectrum) enable input per table above.
22
PCI(EPCI#)
I/O
PCI Output clock that can be early. Input control for Early PCI per table above.
24
PCI
O
PCI Output clock. PCI/PCIF control set by PEN per table above.
25
PCI
O
PCI Output clock. PCI/PCIF control set by PEN per table above.
27
PCI
O
PCI Output clock.
28
AC97 AUDIO(PEN) TI/O Audio clock output and PCIF Function Enable per table above.
Pin Descriptions
PCI Frequency Select Table
Pin Assignment
1
8
9
2
3
4
5
6
7
10
11
12
13
14
16
15
20
17
18
19
25
24
23
22
21
26
27
28
VDD
GND
14.3M
XO
VDD
14.3M(TS)
SLOW#
14.3M(SEL AUDIO)
XI
GND
VDD
GND
SEL24
FS
24M/14.3M Frequency
Select Table
EPCI#
PCI (Pin 22)
0
1 ns early
1
Normal
Early PCI Control Table
SEL24
24M/14.3M
0
14.31818 MHz
1
24.0 MHz
EMI Control
LE#
PCI Low EMI
0
ON
1
OFF
Key: I = Input, TI = tri-level input, O = Output, P = Power supply connection, (T)I/O = Input on power up, becomes an Output after 10ms.
Weak internal pull-up resistors are present on SEL24, EPCI#, FS, LE#, PCISTP#, and SLOW#. These pins should be tied to VDD or GND,
and not be left floating. Internal resistors on PEN, SEL AUDIO, and TS pull to a mid-level (M).
SEL AUDIO
AC97 AUDIO
0
16.9344 MHz
M
24.576 MHz
1
49.152 MHz
AC97 Audio Frequency Select
VDD
PCI(EPCI#)
GND
VDD
AC97 AUDIO(PEN)
24M/14.3M
48M(LE#)
PCI
PCI
PWRDWN#
VDD
PCISTP#
GND
PCI
PEN
Pin 25
Pin 24
0
PCI
PCI
M
PCI
PCIF
1
PCIF
PCIF
PCIF Enable Control
TS
FS
PCI
0
0
Tristate all clocks
0
1
Reserved
M
0
30 MHz
M
1
33.3 MHz
1
0
25 MHz
1
1
37.5 MHz
PCIF continues to run in PCI STOP
mode. See table on page 4.
Spread direction is DOWN..


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