6.10

5

IDT 70121/70125S/L

HIGH-SPEED 2K x 9 DUAL-PORT STATIC RAM WITH BUSY & INTERRUPT

COMMERCIAL TEMPERATURE RANGE

ADDRESS

PREVIOUS DATA VALID

DATA VALID

2654 drw 05

(3,4)

NOTES:

1. Timing depends on which signal is aserted last,

OE or CE.

2. Timing depends on which signal is deaserted first,

OE or CE.

a write operation to the same address location. For simultanious read operations

BUSY has no relationship to valid output data.

5. R/

6. R/

CE

VALID DATA

50%

OE

CURRENT

50%

2654 drw 06

(4)

(1)

(1)

(4)

(2)

(2)