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IDT70T659S10DR Datasheet(PDF) 7 Page - Integrated Device Technology |
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IDT70T659S10DR Datasheet(HTML) 7 Page - Integrated Device Technology |
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7 / 27 page  7 IDT70T651/9S Preliminary High-Speed 2.5V 256/128K x 36 Asynchronous Dual-Port Static RAM Industrial and Commercial Temperature Ranges NOTES: 1. "H" = VIH, "L" = VIL, "X" = Don't Care. 2. It is possible to read or write any combination of bytes during a given access. A few representative samples have been illustrated here. Truth Table I—Read/Write and Enable Control(1,2) OE SEM CE0 CE1 BE3 BE2 BE1 BE0 R/W ZZ Byte 3 I/O27-35 Byte 2 I/O18-26 Byte 1 I/O9-17 Byte 0 I/O0-8 MODE X H H X X X X X X L High-Z High-Z High-Z High-Z Deselected–Power Down X H X L X X X X X L High-Z High-Z High-Z High-Z Deselected–Power Down X H L H H H H H X L High-Z High-Z High-Z High-Z All Bytes Deselected X H L H H H H L L L High-Z High-Z High-Z DIN Write to Byte 0 Only X H L H H H L H L L High-Z High-Z DIN High-Z Write to Byte 1 Only X H L HHL H H L L High-Z DIN High-Z High-Z Write to Byte 2 Only XH L H L H H H L L DIN High-Z High-Z High-Z Write to Byte 3 Only X H L H H H L L L L High-Z High-Z DIN DIN Write to Lower 2 Bytes Only X H LH LLH H L L DIN DIN High-Z High-Z Write to Upper 2 bytes Only X H LH LL LL L L DIN DIN DIN DIN Write to All Bytes L H L H H H H L H L High-Z High-Z High-Z DOUT Read Byte 0 Only LH LH H H L H H L High-Z High-Z DOUT High-Z Read Byte 1 Only LH LH H L H H H L High-Z DOUT High-Z High-Z Read Byte 2 Only LH LH L H H H H L DOUT High-Z High-Z High-Z Read Byte 3 Only LH LH H H LLH L High-Z High-Z DOUT DOUT Read Lower 2 Bytes Only LH LH LLH H H L DOUT DOUT High-Z High-Z Read Upper 2 Bytes Only LH LH LL LLH L DOUT DOUT DOUT DOUT Read All Bytes H H L H L L L L X L High-Z High-Z High-Z High-Z Outputs Disabled X X X X X X X X X H High-Z High-Z High-Z High-Z High-Z Sleep Mode 5632 tbl 02 Truth Table II – Semaphore Read/Write Control(1) NOTES: 1. There are eight semaphore flags written to I/O0 and read from all the I/Os (I/O0-I/O35). These eight semaphore flags are addressed by A0-A2. 2. CE = L occurs when CE0 = VIL and CE1 = VIH. CE = H when CE0 = VIH and/or CE1 = VIL. 3. Each byte is controlled by the respective BEn. To read data BEn = VIL. Inputs(1) Outputs Mode CE(2) R/W OE BE3 BE2 BE1 BE0 SEM I/O1-35 I/O0 H H LLLLL L DATAOUT DATAOUT Read Data in Semaphore Flag(3) H ↑ XXXX L L X DATAIN Write I/O0 into Semaphore Flag L XXXXXX L ______ ______ Not Allowed 5632 tbl 03 |
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