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IDT71V321S25J Datasheet(PDF) 11 Page - Integrated Device Technology |
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IDT71V321S25J Datasheet(HTML) 11 Page - Integrated Device Technology |
11 / 14 page 6.42 IDT71V321/71V421S/L High Speed 3.3V 2K x 8 Dual-Port Static RAM with Interrupts Industrial and Commercial Temperature Ranges 11 AC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range(1) NOTES: 1. 'X' in part numbers indicates power rating (S or L). 71V 321X25 71V 421X25 Com 'l & Ind 71V 321X35 71V 421X35 Com 'l Only 71V 321X55 71V 421X55 Com 'l Only Sym bol Param eter M in.M ax.M in.M ax.M in.M ax. Unit INTERRUPT TIM ING tAS A ddres s S e t-up Tim e 0 ____ 0 ____ 0 ____ ns tWR Write R e co ve ry Tim e 0 ____ 0 ____ 0 ____ ns tINS Inte rrup t S e t Tim e ____ 25 ____ 25 ____ 45 ns tINR Inte rrup t Re se t Tim e ____ 25 ____ 25 ____ 45 ns 3026 tbl 12 Timing Waveformof InterruptMode(1) SET INT CLEAR INT NOTES:. 1. All timing is the same for left and right ports. Port “A” may be either left or right port. Port “B” is the opposite from port “A”. 2. See Interrupt Truth Table. 3. Timing depends on which enable signal ( CE or R/W) is asserted last. 4. Timing depends on which enable signal ( CE or R/W) is de-asserted first. tINS ADDR"A" INT"B" INTERRUPT ADDRESS tWC tAS R/ W"A" tWR 3026 drw 14 (3) (3) (2) (4) tRC INTERRUPT CLEAR ADDRESS ADDR"B" OE"B" tINR INT"A" 3026 drw 15 tAS(3) (3) (2) |
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