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IDT723632 Datasheet(PDF) 9 Page - Integrated Device Technology |
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IDT723632 Datasheet(HTML) 9 Page - Integrated Device Technology |
9 / 26 page 5.22 9 IDT723622/723632/723642 CMOS SyncBiFIFO ™ 256 x 36 x 2, 512 x 36 x 2, 1024 x 36 x 2 COMMERCIAL TEMPERATURE RANGE NOTES: 1. Writing data to the mail1 register when the B0-B35 outputs are active and MBB is HIGH. 2. Writing data to the mail2 register when the A0-A35 outputs are active and MBA is HIGH. SWITCHING CHARACTERISTICS OVER RECOMMENDED RANGES OF SUPPLY VOLTAGE AND OPERATING FREE-AIR TEMPERATURE, CL = 30 pF 723622L15 723622L20 723622L30 723632L15 723632L20 723632L30 723642L15 723642L20 723642L30 Symbol Parameter Min. Max. Min. Max. Min. Max. Unit tA Access Time, CLKA ↑ to A0-A35 and CLKB↑ 311 3 13 315 ns to B0-B35 tPIR Propagation Delay Time, CLKA ↑ to IRA and 2 8 2 10 2 12 ns CLKB ↑ to IRB tPOR Propagation Delay Time, CLKA ↑ to ORA and 1 8 1 10 1 12 ns CLKB ↑ to ORB tPAE Propagation Delay Time, CLKA ↑ to AEA and 1 8 1 10 1 12 ns CLKB ↑ to AEB tPAF Propagation Delay Time, CLKA ↑ to AFA and 1 8 1 10 1 12 ns and CLKB ↑ to AFB tPMF Propagation Delay Time, CLKA ↑ to MBF1 LOW or 0 8 0 10 0 12 ns MBF2 HIGH and CLKB↑ to MBF2 LOW or MBF1 HIGH tPMR Propagation Delay Time, CLKA ↑ to B0-B35(1) and 3 13.5 3 15 3 17 ns CLKB ↑ to A0-A35(2) tMDV Propagation Delay Time, MBA to A0-A35 valid and 3 11 3 13 3 15 ns MBB to B0-B35 Valid tPRF Propagation Delay Time, RST1 LOW to AEB LOW, 1 15 1 20 1 30 ns AFA HIGH, and MBF1 HIGH, and RST2 LOW to AEA LOW, AFB HIGH, and MBF2 HIGH tEN Enable Time, CSA and W/RA LOW to A0-A35 Active 2 12 2 13 2 14 ns and CSB LOW and W/RB HIGH to B0-B35 Active tDIS Disable Time, CSA or W/RA HIGH to A0-A35 at 1 8 1 10 1 11 ns high impedance and CSB HIGH or W/RB LOW to B0-B35 at HIGH impedance |
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