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IDT7143SA45G Datasheet(PDF) 1 Page - Integrated Device Technology |
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IDT7143SA45G Datasheet(HTML) 1 Page - Integrated Device Technology |
1 / 16 page ©2000 Integrated Device Technology, Inc. JUNE 2000 DSC 2746/11 1 HIGH SPEED 2K X 16 DUAL-PORT SRAM IDT7133SA/LA IDT7143SA/LA Features x x x x x High-speed access – Military: 25/35/45/55/70/90ns (max.) – Industrial: 25/35/55ns (max.) – Commercial: 20/25/35/45/55/70/90ns (max.) x x x x x Low-power operation – IDT7133/43SA Active: 1150mW (typ.) Standby: 5mW (typ.) – IDT7133/43LA Active: 1050mW (typ.) Standby: 1mW (typ.) x x x x x Versatile control for write: separate write control for lower and upper byte of each port x x x x x MASTER IDT7133 easily expands data bus width to 32 bits or more using SLAVE IDT7143 x x x x x On-chip port arbitration logic (IDT7133 only) Functional Block Diagram NOTE: 1. IDT7133 (MASTER): BUSY is open drain output and requires pull-up resistor. IDT7143 (SLAVE): BUSY is input. x x x x x BUSY output flag on IDT7133; BUSY input on IDT7143 x x x x x Fully asynchronous operation from either port x x x x x Battery backup operation–2V data retention x x x x x TTL-compatible; single 5V (±10%) power supply x x x x x Available in 68-pin ceramic PGA, Flatpack, PLCC and 100- pin TQFP x x x x x Military product compliant to MIL-PRF-38535 QML x x x x x Industrial temperature range (–40°C to +85°C) is available for selected speeds Description The IDT7133/7143 are high-speed 2K x 16 Dual-Port Static RAMs. The IDT7133 is designed to be used as a stand-alone 16-bit Dual-Port RAM or as a “MASTER” Dual-Port RAM together with the IDT7143 “SLAVE” Dual-Port in 32-bit-or-more word width systems. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 32-bit-or-wider I/O CONTROL MEMORY ARRAY ARBITRATION LOGIC (IDT7133 ONLY) R/ WLUB CEL R/ WLLB OEL I/O0L - I/O7L BUSYL A0L CEL R/ WRUB CER R/ WRLB OER I/O8R -I/O15R I/O0R -I/O7R BUSYR (1) A0R CER 2746 drw 01 A10L ADDRESS DECODER A10R I/O CONTROL ADDRESS DECODER 11 11 (1) I/O8L -I/O15L |
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