Integrated Device Technology, Inc.

MILITARY AND COMMERCIAL TEMPERATURE RANGES

MAY 1994

©1994 Integrated Device Technology, Inc.

DSC-1010/4

®

CMOS STATIC RAM

64K (16K x 4-BIT)

with Output Control

IDT6198S

IDT6198L

FEATURES:

• High-speed (equal access and cycle times)

— Military: 20/25/35/45/55/70/85ns (max.)

— Commercial: 15/20/25/35ns (max.)

• Output Enable (

OE) pin available for added system flexibility

• Low-power consumption

• JEDEC compatible pinout

• Battery back-up operation—2V data retention (L version

only)

• 24-pin CERDIP, high-density 28-pin leadless chip carrier,

and 24-pin SOJ

• Produced with advanced CMOS technology

• Bidirectional data inputs and outputs

• Military product compliant to MIL-STD-883, Class B

DESCRIPTION:

The IDT6198 is a 65,536-bit high-speed static RAM orga-

nized as 16K x 4. It is fabricated using IDT’s high-perfor-

mance, high-reliability technology—CMOS. This state-of-the-

art technology, combined with innovative circuit design tech-

niques, provides a cost-effective approach for memory inten-

sive applications. Timing parameters have been specified to

meet the speed demands of the IDT79R3000 RISC proces-

sors.

Access times as fast as 15ns are available. The IDT6198

when

CS goes HIGH. This capability significantly decreases

system, while enhancing system reliability. The low-power

version (L) also offers a battery backup data retention capa-

bility where the circuit typically consumes only 30

µW when

operating from a 2V battery.

All inputs and outputs are TTL-compatible and operate

from a single 5V supply.

The IDT6198 is packaged in either a 24-pin 300 mil CERDIP,

28-pin leadless chip carrier or 24-pin J-bend small outline IC.

Military grade product is manufactured in compliance with

the latest revision of MIL-STD-883, Class B, making it ideally

suited to military temperature applications demanding the

highest level of performance and reliability.

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

DECODER

65,536-BIT

MEMORY ARRAY

COLUMN I/O

2987 drw 01

INPUT

DATA

CONTROL

WE

CS

GND

OE

FUNCTIONAL BLOCK DIAGRAM

1

6.3