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IDT723622L15PQF Datasheet(PDF) 2 Page - Integrated Device Technology |
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IDT723622L15PQF Datasheet(HTML) 2 Page - Integrated Device Technology |
2 / 26 page 5.22 2 IDT723622/723632/723642 CMOS SyncBiFIFO ™ 256 x 36 x 2, 512 x 36 x 2, 1024 x 36 x 2 COMMERCIAL TEMPERATURE RANGE DESCRIPTION (CONTINUED) Full and almost Empty) to indicate when a selected number of words is stored in memory. Communication between each port may bypass the FIFOs via two 36-bit mailbox registers. Each mailbox register has a flag to signal when new mail has been stored. Two or more devices may be used in parallel to create wider data paths. The IDT723622/723632/723642 is a synchronous (clocked) FIFO, meaning each port employs a synchronous interface. All data transfers through a port are gated to the LOW-to- HIGH transition of a port clock by enable signals. The clocks for each port are independent of one another and can be NOTES: 1. NC – no internal connection 2. Uses Yamaichi socket IC51-1324-828 NC NC A35 A34 A33 A32 VCC A31 A30 GND A29 A28 A27 A26 A25 A24 A23 GND A22 VCC A21 A20 A19 A18 GND A17 A16 A15 A14 A13 VCC A12 NC NC B35 B34 B33 B32 GND B31 B30 B29 B28 B27 B26 VCC B25 B24 GND B23 B22 B21 B20 B19 B18 GND B17 B16 VCC B15 B14 B13 B12 GND NC NC 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 PQ132-1 3022 drw 02 PIN CONFIGURATION PQF Package TOP VIEW asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control. The Input Ready (IRA, IRB) and Almost-Full ( AFA, AFB) flags of a FIFO are two-stage synchronized to the port clock that writes data into its array. The Output Ready (ORA, ORB) and Almost-Empty ( AEA, AEB) flags of a FIFO are two-stage synchronized to the port clock that reads data from its array. Offset values for the Almost-Full and Almost-Empty flags of both FIFOs can be programmed from Port A. The IDT723622/723632/723642 is characterized for op- eration from 0 °C to 70°C. |
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