Electronic Components Datasheet Search |
|
IDT72271L25PF Datasheet(PDF) 2 Page - Integrated Device Technology |
|
IDT72271L25PF Datasheet(HTML) 2 Page - Integrated Device Technology |
2 / 30 page 2 MILITARY AND COMMERCIAL TEMPERATURE RANGES IDT72261/72271 SyncFIFO ™ 16,384 x 9, 32,768 x 9 state of the FWFT/SI pin during Master Reset determines the mode in use. The IDT72261/72271 FIFOs have five flag functions, EF/ OR (Empty Flag or Output Ready), FF/IR (Full Flag or Input Ready), and HF (Half-full Flag). The EF and FF functions are selected in the IDT Standard Mode. The IR and OR functions are selected in the First Word Fall Through Mode. IR indicates that the FIFO has free space to receive data. OR indicates that data contained in the FIFO is available for reading. HF is a flag whose threshold is fixed at the half-way point in memory. This flag can always be used irrespective of mode. PAE, PAF can be programmed independantly to any point in memory. They, also, can be used irrespective of mode. Programmable offsets determine the flag threshold and can be loaded by two methods: parallel or serial. Two default offset settings are also provided, such that PAE can be set at 127 or 1023 locations from the empty boundary and the PAF threshold can be set at 127 or 1023 locations from the full boundary. All these choices are made with LD during Master Reset . In the serial method, SEN together with LD are used to load the offset registers via the Serial Input (SI). In the parallel method, WEN together with LD can be used to load the offset registers via Dn. REN together with LD can be used to read the offsets in parallel from Qn regardless of whether serial or parallel offset loading is selected. During Master Reset ( MRS), the read and write pointers are set to the first location of the FIFO. The FWFT line selects IDT Standard Mode or FWFT Mode. The LD pin selects one of two partial flag default settings (127 or 1023) and, also, serial or parallel programming. The flags are updated accordingly. The Partial Reset ( PRS) also sets the read and write pointers to the first location of the memory. However, the mode setting, programming method, and partial flag offsets are not altered. The flags are updated accordingly. PRS is useful for resetting a device in mid-operation, when repro- gramming offset registers may not be convenient. PIN CONFIGURATIONS PIN 1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 WEN SEN FS VCC VCC GND GND GND GND GND GND GND GND GND D8 D7 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 DNC DNC GND DNC DNC VCC DNC DNC DNC GND DNC DNC Q8 Q7 Q6 GND 3036 drw 02 (2) (2) (2) (2) (2) (2) (2) (2) (2) NOTES : 1. DNC = Do not connect. 2. This pin may either be tied to ground or left open. TQFP (PN64-1, order code: PF) STQFP (PP64-1, order code: TF) TOP VIEW |
Similar Part No. - IDT72271L25PF |
|
Similar Description - IDT72271L25PF |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |