IDT74FCT162344CTE datasheet(7/8 Pages) IDT

Part #	IDT74FCT162344CTE

Description	FAST CMOS ADDRESS/ CLOCK DRIVER

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Manufacturer	IDT [Integrated Device Technology]

Direct Link	http://www.idt.com

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IDT54/74FCT162344AT/CT/ET

FAST CMOS ADDRESS LINE DRIVER

MILITARY AND COMMERCIAL TEMPERATURE RANGES

5.6

7

SWITCH POSITION

TEST CIRCUITS AND WAVEFORMS

TEST CIRCUITS FOR ALL OUTPUTS

DEFINITIONS:

CL=

Load capacitance: includes jig and probe capacitance.

RT = Termination resistance: should be equal to ZOUT of the Pulse

Generator.

3069 lnk 09

Test

Switch

Disable Low

Enable Low

Closed

All Other Tests

Open

Open Drain

3069 drw 04

Pulse

Generator

R T

D.U.T.

VCC

VIN

C L

V OUT

50pF

500

Ω

500

Ω

7.0V

SET-UP, HOLD AND RELEASE TIMES

PULSE WIDTH

HIGH-LOW-HIGH

PULSE

LOW-HIGH-LOW

PULSE

t W

1.5V

3069 drw 05

3069 drw 06

PROPAGATION DELAY

ENABLE AND DISABLE TIMES

3069 drw 07

CONTROL

INPUT

3V

1.5V

0V

3.5V

0V

OUTPUT

NORMALLY

LOW

OUTPUT

NORMALLY

HIGH

SWITCH

CLOSED

SWITCH

OPEN

V OL

V OH

0.3V

t PLZ

t PZL

t PZH

t PHZ

3.5V

0V

1.5V

ENABLE

DISABLE

NOTES:

1. Diagram shown for input Control Enable-LOW and input Control

Disable-HIGH

2. Pulse Generator for All Pulses: Rate

≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns

SAME PHASE

INPUT TRANSITION

3V

1.5V

0V

1.5V

VOH

VOL

t PLH

t PHL

OUTPUT

OPPOSITE PHASE

INPUT TRANSITION

3V

1.5V

0V

t PLH

t PHL

OUTPUT SKEW - tSKn(o)

NOTE:

1. For tSK1(o) OUTPUT1 and OUTPUT 2 are in the same bank,

For tSK2(o) OUTPUT1 and OUTPUT 2 are in different banks on the

same part.

3069 drw 08

PRESET

CLEAR

CLOCK ENABLE

ETC.

SYNCHRONOUS CONTROL

DATA

INPUT

TIMING

INPUT

ASYNCHRONOUS CONTROL

PRESET

CLEAR

ETC.

3V

1.5V

0V

3V

1.5V

0V

3V

1.5V

0V

3V

1.5V

0V

t SU

t H

t REM

H

t SU

t

tPLH1

OUTPUT 1

OUTPUT 2

tSK1(o)

tPLH2

3V

0V

VOH

1.5V

VOL

VOH

1.5V

VOL

INPUT

tPHL1

tPHL2

tSK1(o)

tSKn(o) = |tPLH2 - tPLH1| or |tPHL2 - tPHL1|

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IDT74FCT162344CTE Datasheet(PDF) 7 Page - Integrated Device Technology

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