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IDT72811L15TFI Datasheet(PDF) 8 Page - Integrated Device Technology |
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IDT72811L15TFI Datasheet(HTML) 8 Page - Integrated Device Technology |
8 / 16 page 8 Commercial And Industrial Temperature Range IDT72801/728211/72821/72831/72841/72851 NUMBER OF WORDS IN ARRAY A FFA FFA FFA FFA FFA PAFA PAFA PAFA PAFA PAFA PAEA PAEA PAEA PAEA PAEA EFA EFA EFA EFA EFA NUMBER OF WORDS IN ARRAY B FFB FFB FFB FFB FFB PAFB PAFB PAFB PAFB PAFB PAEB PAEB PAEB PAEB PAEB EFB EFB EFB EFB EFB 72801 72811 72821 00 0 H H L L 1 to n(1) 1 to n(1) 1 to n(1) HH L H (n+1) to (256-(m+1)) (n+1) to (512-(m+1)) (n+1) to (1,024-(m+1)) H H H H (256-m)(2) to 255 (512-m)(2) to 511 (1,024-m)(2) to 1,023 H L H H 256 512 1,024 L L H H NUMBER OF WORDS IN ARRAY A FFA FFA FFA FFA FFA PAFA PAFA PAFA PAFA PAFA PAEA PAEA PAEA PAEA PAEA EFA EFA EFA EFA EFA NUMBER OF WORDS IN ARRAY B FFB FFB FFB FFB FFB PAFB PAFB PAFB PAFB PAFB PAEB PAEB PAEB PAEB PAEB EFB EFB EFB EFB EFB 72831 72841 72851 00 0 H H L L 1 to n(1) 1 to n(1) 1 to n(1) HH L H (n+1) to (2,048-(m+1)) (n+1) to (4,096-(m+1)) (n+1) to (8,192-(m+1)) H H H H (2,048-m)(2) to 2,047 (4,096-m)(2) to 4,095 (8,192-m)(2) to 8,191 H L H H 2,048 4,096 8,192 L L H H Programmable Almost–Full Flag ( PAFA, PAFB)—PAFA(PAFB)willgo LOW when the amount of data in Array A (B) reaches the almost-full condition. If no reads are performed after Reset, PAFA(PAFB)willgoLOWafter(256-m) writes to the IDT72801's FIFO A (B); (512-m) writes to the IDT72811's FIFO A (B); (1,024-m) writes to the IDT72821's FIFO A (B); (2,048-m) writes to the IDT72831's FIFO A (B); (4,096-m) writes to the IDT72841's FIFO A (B); or (8,192-m) writes to the IDT72851's FIFO A (B). FFA(FFB)issynchronizedwithrespecttotheLOW-to-HIGHtransitionofthe Write Clock WCLKA (WCLKB). The offset “m” is defined in the Full Offset registers. If there is no Full offset specified, PAFA(PAFB)willgoLOWatFull-7words. PAFA(PAFB)issynchronizedwithrespecttotheLOW-to-HIGHtransition of WCLKA (WCLKB). ProgrammableAlmost–EmptyFlag( PAEA, PAEB) —PAEA(PAEB)will goLOWwhenthereadpointeris"n+1"locationslessthanthewritepointer. The offset"n"isdefinedintheEmptyOffset registers. Ifnoreadsareperformedafter Reset, PAEA(PAEB) will go HIGH after "n+1" writes to FIFO A (B). If there is no Empty offset specified, PAEA(PAEB)willgoLOWatEmpty+7 words. PAEA(PAEB)issynchronizedwithrespecttotheLOW-to-HIGHtransition of the Read Clock RCLKA (RCLKB). Data Outputs (QA0 – QA8, QB0 – QB8 ) — QA0 - QA8 are the nine data outputs for memory array A, QB0 - QB8 are the nine data outputs for memory array B. TABLE 1: STATUS .LAGS .OR A AND B .I.OS NOTES: 1. n = Empty Offset (n = 7 default value) 2. m = Full Offset (m = 7 default value) |
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