IDT54/74FCT3573/3573A

3.3V CMOS OCTAL TRANSPARENT LATCHES

MILITARY AND COMMERCIAL TEMPERATURE RANGES

8.13

6

DEFINITIONS:

Load capacitance: includes jig and probe capacitance.

Generator.

NOTES:

1. Diagram shown for input Control Enable-LOW and input Control Disable-

HIGH.

2. Pulse Generator for All Pulses: Rate

3V

1.5V

0V

3V

1.5V

0V

3V

1.5V

0V

3V

1.5V

0V

DATA

INPUT

TIMING

INPUT

ASYNCHRONOUS CONTROL

PRESET

CLEAR

ETC.

SYNCHRONOUS CONTROL

HIGH-LOW-HIGH

PULSE

LOW-HIGH-LOW

PULSE

1.5V

1.5V

SAME PHASE

INPUT TRANSITION

3V

1.5V

0V

1.5V

OUTPUT

OPPOSITE PHASE

INPUT TRANSITION

3V

1.5V

0V

CONTROL

INPUT

3V

1.5V

0V

3V

0V

OUTPUT

NORMALLY

LOW

OUTPUT

NORMALLY

HIGH

SWITCH

6V

SWITCH

GND

0.3V

0.3V

3V

0V

1.5V

1.5V

ENABLE

DISABLE

PRESET

CLEAR

CLOCK ENABLE

ETC.

Pulse

Generator

D.U.T.

50pF

500

Ω

500

Ω

GND

6V

Open

ENABLE AND DISABLE TIMES

PROPAGATION DELAY

SET-UP, HOLD AND RELEASE TIMES

PULSE WIDTH

SWITCH POSITION

TEST CIRCUITS AND WAVEFORMS

TEST CIRCUITS FOR ALL OUTPUTS

3093 drw 07

3093 drw 05

3093 drw 04

3093 drw 03

3093 drw 06

Test

Switch

Open Drain

Disable Low

Enable Low

6V

Disable High

Enable High

GND

All Other tests

Open

3093 lnk 08