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IDT7MP4060S20Z Datasheet(PDF) 1 Page - Integrated Device Technology

Part # IDT7MP4060S20Z
Description  128K x 32 CMOS STATIC RAM MODULES
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

IDT7MP4060S20Z Datasheet(HTML) 1 Page - Integrated Device Technology

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COMMERCIAL TEMPERATURE RANGE
SEPTEMBER 1996
©1996 Integrated Device Technology, Inc.
DSC-3147/7
7.09
1
IDT7MP4060
IDT7MP4095
128K x 32
CMOS STATIC RAM
MODULES
FEATURES:
• High density 4 megabit static RAM modules
• Low profile 64-pin ZIP (Zig-zag In-line vertical Package),
64-lead, 72-lead SIMMs (Single In-line Memory Modules)
• Fast access time: 15ns (max.)
• Surface mounted plastic components on an epoxy
laminate (FR-4) substrate
• Single 5V (
±10%) power supply
• Multiple GND pins and decoupling capacitors for maxi-
mum noise immunity
• Inputs/outputs directly TTL compatible
• Gold plated fingers on the SIMM version
DESCRIPTION:
The IDT7MP4095/7MP4060 are 128K x 32 static RAM
modules constructed on an epoxy laminate (FR-4) substrate
using four 128K x 8 static RAMs in plastic SOJ packages. The
IDT7MP4095/7MP4060 are available with access times as
fast as 15ns with minimal power consumption.
The IDT7MP4095 is packaged in a 64-pin FR-4 ZIP (Zig-
zag In-line vertical Package) or a 64-lead SIMM (Single In-line
Memory Module). The IDT7MP4060 is packaged in a 72-lead
SIMM. The ZIP configuration allows 64 pins to be placed on
a package 3.65 inches long and 0.21 inches thick. At only 0.60
inches high, this low-profile package is ideal for systems with
minimum board spacing, while the SIMM configuration allows
use of edge mounted sockets to secure the module.
All inputs and outputs of the IDT7MP4095/7MP4060 are
TTL compatible and operate from a single 5V supply. Full
asynchronous circuitry requires no clocks or refresh for opera-
tion and provides equal access and cycle times for ease of
use.
ZIP, SIMM
TOP VIEW
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
Integrated Device Technology, Inc.
PIN NAMES
I/O031
Data Inputs/Outputs
A016
Addresses
CS14
Chip Selects
WE
Write Enable
OE
Output Enable
VCC
Power
GND
Ground
NC
No Connect
3147 tbl 01
PIN CONFIGURATION – 7MP4095
FUNCTIONAL BLOCK DIAGRAM
OE
WE
3147 drw 01
8
17
8
8
ADDRESS
I/O 0-31
128K x 32
RAM
CS4
8
CS3
CS2
CS1
31
29
9
11
13
15
17
19
21
23
25
1
3
5
7
27
33
63
61
41
43
45
47
49
51
53
55
57
35
37
39
59
32
30
28
8
10
12
14
16
18
20
22
24
2
4
6
26
34
64
62
42
44
46
48
50
52
54
56
58
36
38
40
60
GND
CS3
A16
I/O16
I/O17
I/O18
I/O19
A10
A11
A12
A13
I/O20
I/O21
I/O22
I/O23
GND
I/O0
I/O1
I/O2
I/O3
VCC
A7
A8
A9
I/O4
I/O5
I/O6
WE
I/O7
CS1
PD0
A14
CS4
NC
OE
I/O24
I/O25
I/O26
I/O27
A3
A4
A5
VCC
A6
I/O28
I/O29
I/O30
I/O31
PD1
GND
I/O8
I/O9
I/O10
I/O11
A0
A1
A2
I/O12
I/O13
I/O14
I/O15
GND
CS2
A15
PD0 - OPEN
PD1 - OPEN
For latest information contact IDT's web site at www.idt.com or fax-on-demand at 408-492-8391.


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