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ILC1232N Datasheet(PDF) 4 Page - Impala Linear Corporation |
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ILC1232N Datasheet(HTML) 4 Page - Impala Linear Corporation |
4 / 5 page Power Monitor The RST and RST pins are asserted whenever VCC falls below the reset threshold voltage set by the TOL pin. A 5% tolerance level (4.62V reset threshold voltage) can be selected by connecting the TOL pin to ground or a 10% tol- erance (4.37V reset threshold voltage) can be selected by connecting the TOL pin to VCC. The reset pins will remain asserted for a period of 250ms after VCC has risen above the reset threshold voltage. The reset function ensures the microprocessor is properly reset and powers up into a known condition after a power failure. RST will remain valid with VCC as low as 1.4V. RST tPDLY tRST PBRST RST tPB Pushbutton Reset Input The PBRST input can be driven with a manual pushbutton switch or with external logic signals. The input is internally debounced and requires an active low signal to force the reset outputs into their active states. The PBRST input will recognize any pulse that is 20ms in duration or greater and will ignore all pulses that are less than 1ms in duration. Watchdog Timer The microprocessor can be monitored by connecting the ST pin (watchdog input) to a bus line or I/O line. If a high-to-low transition does not occur on the ST pin within the watchdog timeout period set by the TD pin (see Table 1), the RST and RST pins will be asserted resulting in a microprocessor reset. RST and RST will remain asserted for 250ms when this occurs. A minimum pulse of 75ns or any transition high- to-low on the ST pin will reset the watchdog timer. The watchdog timer will be reset if ST sees a valid transition within the watchdog timeout period. tTD TD Pin Min. Typ. Max. GND 62.5ms 150ms 250ms Open 250ms 600ms 1000ms VCC 500ms 1200ms 2000ms Industry P/N ILC Direct Replacement DS1232LP ILC1232N DS1232LPS-2 ILC1232M DS1232 ILC1232N DS1232LPN ILC1232N DS1232LPSN-2 ILC1232M DS1232N ILC1232N MAX1232CPA ILC1232N MAX1232CSA ILC1232M MAX1232EPA ILC1232N MAX1232ESA ILC1232M MAX1232C/D ILC1232D RST tRPD VCCTP VCCTP tRPU VCC RST tSD ST tTD ILC1232 mP Supervisory Circuit Sept 1999 Circuit Decription Power-Up/Power-Down Sequence Pushbutton Reset Watchdog Input Table 1: Watchdog Timeout Period Alternate Cross Reference Guide Impala Linear Corporation 4 (408) 574-3939 www.impalalinear.com ILC1232 1.1 June 1999 |
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