6.22

6

MILITARY AND COMMERCIAL TEMPERATURE RANGES

IDT54/74FCT841AT/BT/CT/DT

FAST CMOS BUS INTERFACE LATCHES

TEST CIRCUITS AND WAVEFORMS

TEST CIRCUITS FOR ALL OUTPUTS

SWITCH POSITION

Pulse

Generator

D.U.T.

50pF

500

Ω

500

Ω

7.0V

3V

1.5V

0V

3V

1.5V

0V

3V

1.5V

0V

3V

1.5V

0V

DATA

INPUT

TIMING

INPUT

ASYNCHRONOUS CONTROL

PRESET

CLEAR

ETC.

SYNCHRONOUS CONTROL

HIGH-LOW-HIGH

PULSE

LOW-HIGH-LOW

PULSE

1.5V

1.5V

SAME PHASE

INPUT TRANSITION

3V

1.5V

0V

1.5V

OUTPUT

OPPOSITE PHASE

INPUT TRANSITION

3V

1.5V

0V

CONTROL

INPUT

3V

1.5V

0V

3.5V

0V

OUTPUT

NORMALLY

LOW

OUTPUT

NORMALLY

HIGH

SWITCH

CLOSED

SWITCH

OPEN

0.3V

0.3V

3.5V

0V

1.5V

1.5V

ENABLE

DISABLE

PRESET

CLEAR

CLOCK ENABLE

ETC.

SET-UP, HOLD AND RELEASE TIMES

PULSE WIDTH

ENABLE AND DISABLE TIMES

PROPAGATION DELAY

NOTES:

1. Diagram shown for input Control Enable-LOW and input Control Disable-

HIGH

2. Pulse Generator for All Pulses: Rate

Test

Switch

Disable Low

Enable Low

Closed

All Other Tests

Open

Open Drain

DEFINITIONS:

Load capacitance: includes jig and probe capacitance.

Generator.

2571 drw 04

2571 drw 05

2571 drw 06

2571 drw 07

2571 lnk 11

2571 drw 08