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IA80C152JA Datasheet(PDF) 4 Page - InnovASIC, Inc |
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IA80C152JA Datasheet(HTML) 4 Page - InnovASIC, Inc |
4 / 32 page Page 4 of 32 IA80C152 Preliminary Data Sheet UNIVERSAL COMMUNICATIONS CONTROLLER Copyright © 2000 innovASIC [_________The End of Obsolescence ™ The GSC is a serial interface that can be programmed to support CSMA/CD, SDLC, user definable protocols, and limited HDLC. Protocol specific features are supported in hardware such as address recognition, collision resolution, CRC generation and errors, automatic re-transmission, and hardware acknowledge. The CSMA/CD protocol meets the requirements of ISO/IEC 8802-3 and ANSI/IEEE Std 802.3 to the extent implemented in the original IC. The SDLC protocol meets the requirements of IBM GA27-3093-04 to the extent implemented in the original IC. Functional Block Diagram Figure 4 shows the major functional blocks of the IA80C152. Each version of the IA80C152 function identically to each other with the exception of the 2 additional I/O ports (Port 5 and Port 6) in the JB and JD versions. Figure 4 - Functional Block Diagram 256x8 RAM C8051 CPU UART DMA GSC Port 0 Port 1 Port 2 Port 4 Port 3 Port 5 Port 6 Interrupts Timers Control Address/Data Clock Gen. & Timing XTAL Reset Memory Control I/O for Memory, GSC, DMA, UART, Interrupts, Timers = JB and JD Versions Only |
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