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28F010 Datasheet(PDF) 7 Page - Intel Corporation |
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28F010 Datasheet(HTML) 7 Page - Intel Corporation |
7 / 30 page 28F010 Table 2 28F010 Bus Operations Mode VPP(1) A0 A9 CE OE WE DQ0–DQ7 Read VPPL A0 A9 VIL VIL VIH Data Out Output Disable VPPL XX VIL VIH VIH Tri-State READ-ONLY Standby VPPL XX VIH X X Tri-State Intelligent Identifier (Mfr)(2) VPPL VIL VID(3) VIL VIL VIH Data e 89H Intelligent Identifier (Device)(2) VPPL VIH VID(3) VIL VIL VIH Data e B4H Read VPPH A0 A9 VIL VIL VIH Data Out(4) READWRITE Output Disable VPPH XX VIL VIH VIH Tri-State Standby(5) VPPH XX VIH X X Tri-State Write VPPH A0 A9 VIL VIH VIL Data In(6) NOTES 1 Refer to DC Characteristics When VPP e VPPL memory contents can be read but not written or erased 2 Manufacturer and device codes may also be accessed via a command register write sequence Refer to Table 3 All other addresses low 3 VID is the Intelligent Identifier high voltage Refer to DC Characteristics 4 Read operations with VPP e VPPH may access array data or the Intelligent Identifier codes 5 With VPP at high voltage the standby current equals ICC a IPP (standby) 6 Refer to Table 3 for valid Data-In during a write operation 7 X can be VIL or VIH tents of the register default to the read command making the 28F010 a read-only memory In this mode the memory contents cannot be altered Or the system designer may choose to ‘‘hardwire’’ VPP making the high voltage supply constantly available In this case all Command Register func- tions are inhibited whenever VCC is below the write lockout voltage VLKO (See Power UpDown Protec- tion) The 28F010 is designed to accommodate ei- ther design practice and to encourage optimization of the processor-memory interface The two-step programerase write sequence to the Command Register provides additional software write protections BUS OPERATIONS Read The 28F010 has two control functions both of which must be logically active to obtain data at the out- puts Chip-Enable (CE ) is the power control and should be used for device selection Output-Enable (OE ) is the output control and should be used to gate data from the output pins independent of de- vice selection Refer to AC read timing waveforms When VPP is high (VPPH) the read operation can be used to access array data to output the Intelligent Identifier codes and to access data for program erase verification When VPP is low (VPPL) the read operation can only access the array data Output Disable With OE at a logic-high level (VIH) output from the device is disabled Output pins are placed in a high- impedance state Standby With CE at a logic-high level the standby opera- tion disables most of the 28F010’s circuitry and sub- stantially reduces device power consumption The outputs are placed in a high-impedance state inde- pendent of the OE signal If the 28F010 is dese- lected during erasure programming or program erase verification the device draws active current until the operation is terminated Intelligent Identifier Operation The Intelligent Identifier operation outputs the manu- facturer code (89H) and device code (B4H) Pro- gramming equipment automatically matches the de- vice with its proper erase and programming algo- rithms 7 |
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