TB28F004S5-100 datasheet(9/37 Pages) INTEL

Part #	TB28F004S5-100

Description	BYTE-WIDE SMART 5 FlashFile MEMORY FAMILY 4, 8, AND 16 MBIT

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Manufacturer	INTEL [Intel Corporation]

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E

BYTE-WIDE SMART 5 FlashFile™ MEMORY FAMILY

9

PRODUCT PREVIEW

2.0

PRINCIPLES OF OPERATION

The byte-wide Smart 5 FlashFile memories include

an on-chip WSM to manage block erase, program,

and lock-bit configuration functions. It allows for:

100% TTL-level control inputs, fixed power supplies

during

block

erasure,

program,

and

lock-bit

configuration, and minimal processor overhead with

RAM-like interface timings.

After initial device power-up or return from deep

power-down mode (see Bus

Operations),

the

device defaults to read array mode. Manipulation of

external memory control pins allow array read,

standby, and output disable operations.

Status

register

and

identifier

codes

can

be

accessed through the CUI independent of the VPP

voltage. High voltage on VPP enables successful

block erasure, program, and lock-bit configuration.

All functions associated with altering memory

contents—block

erase,

program,

lock-bit

configuration, status, and identifier codes—are

accessed via the CUI and verified through the

status register.

Commands are written using standard micro-

processor write timings. The CUI contents serve as

input to the WSM that controls block erase,

program, and lock-bit configuration operations. The

internal algorithms are regulated by the WSM,

including pulse repetition, internal verification, and

margining

of

data.

Addresses

and

data

are

internally latched during write cycles. Writing the

appropriate command outputs array data, accesses

the identifier codes, or outputs status register data.

Interface software that initiates and polls progress

of block erase, program, and lock-bit configuration

can be stored in any block. This code is copied to

and executed from system RAM during flash

memory updates. After successful completion,

reads are again possible via the Read Array

command. Block erase suspend allows system

software to suspend a block erase to read data

from or program data to any other block. Program

suspend allows system software to suspend a

program to read data from any other flash memory

array location.

64-Kbyte Block

1FFFFF

31

1F0000

1EFFFF

1E0000

1DFFFF

1D0000

1CFFFF

1C0000

1BFFFF

30

29

28

27

1B0000

1AFFFF

1A0000

19FFFF

190000

18FFFF

180000

17FFFF

26

25

24

23

170000

16FFFF

160000

15FFFF

150000

14FFFF

140000

13FFFF

22

21

20

19

130000

12FFFF

120000

11FFFF

110000

10FFFF

100000

0FFFFF

18

17

16

15

0F0000

0EFFFF

0E0000

0DFFFF

0D0000

0CFFFF

0C0000

0BFFFF

14

13

12

11

0B0000

0AFFFF

0A0000

09FFFF

090000

08FFFF

080000

07FFFF

10

9

8

7

070000

06FFFF

060000

05FFFF

050000

04FFFF

040000

03FFFF

6

5

4

3

030000

02FFFF

020000

01FFFF

010000

00FFFF

000000

2

1

0

64-Kbyte Block

8-Mbit

16-Mbit

4-Mbit

Figure 4. Memory Map

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TB28F004S5-100 Datasheet(PDF) 9 Page - Intel Corporation

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