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E28F016S5-120 Datasheet(PDF) 6 Page - Intel Corporation |
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E28F016S5-120 Datasheet(HTML) 6 Page - Intel Corporation |
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6 / 37 page  BYTE-WIDE SMART 5 FlashFile™ MEMORY FAMILY 6 PRODUCT PREVIEW To protect programmed data, each block can be locked. This block locking mechanism uses a combination of bits, block lock-bits and a master lock-bit, to lock and unlock individual blocks. The block lock-bits gate block erase and program operations, while the master lock-bit gates block lock-bit configuration operations. Lock-bit config- uration operations (Set Block Lock-Bit, Set Master Lock-Bit, and Clear Block Lock-Bits commands) set and clear lock-bits. The status register and RY/BY# output indicate whether or not the device is busy executing or ready for a new command. Polling the status register, system software retrieves WSM feedback. The RY/BY# output gives an additional indicator of WSM activity by providing a hardware status signal. Like the status register, RY/BY#-low indicates that the WSM is performing a block erase, program, or lock-bit configuration. RY/BY#-high indicates that the WSM is ready for a new command, block erase is suspended (and program is inactive), program is suspended, or the device is in deep power-down mode. The Automatic Power Savings (APS) feature substantially reduces active current when the device is in static mode (addresses not switching). In APS mode, the typical ICCR current is 1 mA. When CE# and RP# pins are at VCC, the component enters a CMOS standby mode. Driving RP# to GND enables a deep power-down mode which significantly reduces power consumption, provides write protection, resets the device, and clears the status register. A reset time (tPHQV) is required from RP# switching high until outputs are valid. Likewise, the device has a wake time (tPHEL) from RP#-high until writes to the CUI are recognized. 1.3 Pinout and Pin Description The family of devices is available in 40-lead TSOP (Thin Small Outline Package, 1.2 mm thick) and 44-lead PSOP (Plastic Small Outline Package). Pinouts are shown in Figures 2 and 3. 4-Mbit: A - A , 8-Mbit: A - A , 16-Mbit: A - A 0 18 0 19 0 20 Input Buffer Output Buffer Identifier Register Status Register Command Register I/O Logic Data Comparator Input Buffer Address Latch Address Counter Y Decoder X Decoder Y Gating 4-Mbit: Eight 8-Mbit: Sixteen 16-Mbit: Thirty-Two 64-Kbyte Blocks Write State Machine Program/Erase Voltage Switch CE# WE# OE# RP# RY/BY# V V GND DQ - DQ PP CC VCC 0 7 Figure 1. Block Diagram |
Similar Part No. - E28F016S5-120 |
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