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80C31BH Datasheet(PDF) 7 Page - Intel Corporation |
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80C31BH Datasheet(HTML) 7 Page - Intel Corporation |
7 / 16 page AUTOMOTIVE 80C31BH80C51BH87C51 PROGRAM MEMORY LOCK (EPROM Only) The 87C51 contains two program memory lock schemes Encrypted Verify and Lock Bits Encrypted Verify The 87C51 implements a 32- byte EPROM array that can be programmed by the customer and which can then be used to encrypt the program code bytes during EPROM verification The EPROM verification procedure is performed as usual except that each code byte comes out logical- ly X-NORed with one of the 32 key bytes The key bytes are gone through in sequence Therefore to read the ROM code one has to know the 32 key bytes in their proper sequence Lock Bits Also on the chip are two Lock Bits which can be left unprogrammed (U) or can be pro- grammed (P) to obtain the following additional fea- tures Bit 1 Bit 2 Additional Features U U none PU Externally fetched code can not access internal Program Memory Further programming disabled U P (Reserved for Future definition) PP Externally fetched code can not access internal Program Memory Further programming disabled Program verification is disabled When Lock Bit 1 is programmed the logic level at the EA pin is sampled and latched during reset If the device is powered up without a reset the latch initializes to a random value and holds that value until reset is activated It is necessary that the latched value of EA be in agreement with the current logic level at that pin in order for the device to func- tion properly ONCE MODE The ONCE (‘‘on-circuit emulation’’) mode facilitates testing and debugging of systems using the 87C51 without the 87C51 having to be removed from the circuit The ONCE mode is invoked by 1 Pull ALE low while the device is in reset and PSEN is high 2 Hold ALE low as RST is deactivated While the device is in ONCE mode the Port 0 pins go into a float state and the other port pins and ALE and PSEN are weakly pulled high The oscillator cir- cuit remains active While the 87C51 is in this mode an emulator or test CPU can be used to drive the circuit Normal operation is restored when a normal reset is applied 7 |
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