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TP0C51BH Datasheet(PDF) 4 Page - Intel Corporation

Part # TP0C51BH
Description  CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

TP0C51BH Datasheet(HTML) 4 Page - Intel Corporation

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AUTOMOTIVE 80C31BH80C51BH87C51
Diagrams are for pin reference only Package sizes are not to scale
270419 – 3
Pin (PDIP)
EPROM only
Do not connect reserved pins
270419 – 4
Pad (PLCC)
Figure 3 Pin Connections
PIN DESCRIPTION
VCC Supply voltage during normal Idle and Power
Down operations
VSS Circuit ground
VSS1
VSS1 (EPROM PLCC only) secondary
ground Provided to reduce ground bounce and im-
prove power supply bypassing
NOTE
This pin is not a substitute for the VSS pin (pin 22)
For ROM and ROMless pin 1 is reserveddo not
connect
Port 0
Port 0 is an 8-bit open drain bidirectional IO
port As an output port each pin can sink 8 LS TTL
inputs Port 0 pins that have 1s written to them float
and in that state can be used as high-impedance
inputs
Port 0 is also the multiplexed low-order address and
data bus during accesses to external memory In this
application it uses strong internal pullups when emit-
ting 1s
Port 0 also receives the code bytes during EPROM
programming and outputs the code bytes during
program verification External pullups are required
during program verification
Port 1
Port 1 is an 8-bit bidirectional IO port with
internal pullups Port 1 pins that have 1s written to
them are pulled high by the internal pullups and in
that state can be used as inputs As inputs Port 1
pins that are externally being pulled low will source
current (IIL on the datasheet) because of the inter-
nal pullups
Port 1 also receives the low-order address bytes
during EPROM programming and program verifica-
tion
Port 2
Port 2 is an 8-bit bidirectional IO port with
internal pullups Port 2 pins that have 1s written to
them are pulled high by the internal pullups and in
that state can be used as inputs As inputs Port 2
pins that are externally being pulled low will source
current (IIL on the data sheet) because of the inter-
nal pullups
Port 2 emits the high-order address byte during
fetches from external Program memory and during
accesses to external Data Memory that use 16-bit
address (MOVX
DPTR) In this application it uses
strong internal pullups when emitting 1s
During accesses to external Data Memory that use
8-bit addresses (MOVX
Ri) Port 2 emits the con-
tents of the P2 Special Function Register
Port 2 also receives some control signals and the
high-order address bits during EPROM programming
and program verification
Port 3
Port 3 is an 8-bit bidirectional IO port with
internal pullups Port 3 pins that have 1s written to
them are pulled high by the internal pullups and in
that state can be used as inputs As inputs Port 3
pins that are externally being pulled low will source
current (IIL on the datasheet) because of the pull-
ups
4


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