87C196KRKQ 87C196JVJT 87C196JRJQ

The 87C196KRKQJVJTJRJQ will meet these specifications

Symbol

Parameter

Min

Max

Units

RD Low to CLKOUT

4

30

ns

Falling Edge

RD Low Period

RD Rising Edge to

ALEADV Rising Edge

RD Low to Address Float

5

ALEADV Falling Edge

ns

to WR Falling Edge

CLKOUT Low to

b

525

ns

WR Falling Edge

Data Stable to WR Rising Edge

ns

CLKOUT High to WR

b

10

15

ns

Rising Edge

WR Low Period

ns

Data Hold after WR Rising Edge

ns

WR Rising Edge to ALEADV

Rising Edge

BHE INST Hold after WR

ns

Rising Edge

AD8 – 15 Hold after WR Rising Edge

ns

BHE INST Hold after RD Rising Edge

ns

AD8 – 15 Hold after RD Rising Edge

ns

NOTES

1 Testing performed at 40 MHz however the device is static by design and will typically operate below 1 Hz

2 Typical specifications not guaranteed

3 Assuming back-to-back bus cycles

4 8-bit bus only

11