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A28F010 Datasheet(PDF) 10 Page - Intel Corporation |
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A28F010 Datasheet(HTML) 10 Page - Intel Corporation |
10 / 23 page A28F010 290266 – 5 Bus Command Comments Operation Standby Wait for VPP Ramp to VPPH(1) Initialize Pulse-Count Write Set-up Data e 40H Program Write Program Valid AddressData Standby Duration of Program Operation (tWHWH1) Write Program(3) Data e C0H Stops Program Verify Operation(2) Standby tWHGL Read Read Byte to Verify Programming Standby Compare Data Output to Data Expected Write Read Data e 00H Resets the Register for Read Operations Standby Wait for VPP Ramp to VPPL(1) NOTES 1 See DC Characteristics for value of VPPH The VPP power supply can be hard-wired to the device or switchable When VPP is switched VPPL may be ground no-connect with a resistor tied to ground or less than 65V Refer to Principles of Operation 2 Refer to Principles of Operation 3 Program Verify is only performed after byte program- ming A final readcompare may be performed (option- al) after the register is written with the Read command 4 CAUTION The algorithm MUST BE FOLLOWED to ensure proper and reliable operation of the de- vice Figure 4 28F010 Quick-Pulse Programming Algorithm 10 |
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