4-148

March 1997

82C237

CMOS High Performance

Programmable DMA Controller

Features

• Fully Compatible with Intersil 82C37A

- 82C237 May be Used in 8MHz and 12.5MHz 82C37A

Sockets

• Optimized for 10MHz and 12.5MHz 80C286 Systems

• Special Mode Permits 16-Bit, Zero Wait State DMA

Transfers

• High Speed Data Transfers:

- Up to 6.25MBytes/sec with 12.5MHz Clock in

Normal Mode

- Up to 12.5MBytes/sec with 12.5MHz Clock in 16-Bit

Mode

• Compatible with the NMOS 8237A

• Four Independent Maskable Channels with Autoinitial-

ization Capability

• Cascadable to any Number of Channels

• Memory-to-Memory Transfers

• Static CMOS Design Permits Low Power Operation

- ICCSB = 10

µA Maximum

- ICCOP = 2mA/MHz Maximum

• Fully TTL/CMOS Compatible

• Internal Registers may be Read from Software

Description

The 82C237 is a modified version of the 82C37A. The

82C237 is fully software and pin for pin compatible with the

82C37A but provides an additional mode for 16-bit DMA

transfers, as well as enhanced speed. Each channel may be

individually programmed for 8-bit or 16-bit data transfers.

The 82C237 controller can improve system performance by

allowing external devices to transfer data directly to or from

system memory. Memory-to-memory transfer capability is

also provided, along with a memory block initialization fea-

ture. DMA requests may be generated by either hardware or

software, and each channel is independently programmable

with a variety of features for flexible operation.

The 82C237 is designed to be used with an external address

latch, such as the 82C82, to demultiplex the most significant

8 bits of address. An additional latch is required to

temporarily store the most significant 8 bits of data if 16-bit

memory-to-memory transfers are desired. The 82C237 can

be used with industry standard microprocessors such as

80C286, 80286, 80C86, 80C88, 8086, 8088, 8085, Z80,

NSC800, 80186 and others. Multimode programmability

allows the user to select from three basic types of DMA

services, and reconfiguration under program control is

possible even with the clock to the controller stopped. Each

channel has a full 64K address and word count range, and

may be programmed to autoinitialize these registers

following DMA termination (end of process).

Ordering Information

PACKAGE

TEMPERATURE

RANGE

8MHz

12.5MHz

PKG. NO.

PDIP

CP82C237

CP82C237-12

E40.6

IP82C237

IP82C237-12

E40.6

PLCC

CS82C237

CS82C237-12

N44.65

IS82C237

IS82C237-12

N44.65

SBDIP

CD82C237

CD82C237-12

F40.6

ID82C237

ID82C237-12

F40.6

MD82C237/B

MD82C237-12/B

F40.6

SMD#

5962-9054304MQA

5962-9054305MQA

F40.6

CLCC

MR82C237/B

MR82C237-12/B

J44.A

SMD#

5962-9054304MXA

5962-9054305MXA

J44.A

File Number

2965.1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

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