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AD7520JD Datasheet(PDF) 2 Page - Intersil Corporation |
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AD7520JD Datasheet(HTML) 2 Page - Intersil Corporation |
2 / 9 page 10-8 Absolute Maximum Ratings Thermal Information Supply Voltage (V+ to GND). . . . . . . . . . . . . . . . . . . . . . . . . . . +17V VREF. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25V Digital Input Voltage Range . . . . . . . . . . . . . . . . . . . . . . . V+ to GND Output Voltage Compliance . . . . . . . . . . . . . . . . . . . . -100mV to V+ Operating Conditions Temperature Ranges JN, KN, LN Versions . . . . . . . . . . . . . . . . . . . . . . . . . .0oC to 70oC JD, KD, LD Versions . . . . . . . . . . . . . . . . . . . . . . . . -25oC to 85oC SD, UD Versions . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC Thermal Resistance (Typical, Note 1) θJA (oC/W) θJC (oC/W) 16 Ld PDIP Package . . . . . . . . . . . . . . . . 100 N/A 18 Ld PDIP Package . . . . . . . . . . . . . . . . 90 N/A CERDIP Package . . . . . . . . . . . . . . . . . . 75 20 Maximum Junction Temperature (Hermetic Package) . . . . . . . . 175oC Maximum Junction Temperature (Plastic Packages) . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. The digital control inputs are zener protected; however, permanent damage may occur on unconnected units under high energy electrostatic fields. Keep unused units in conductive foam at all times. Do not apply voltages higher than VDD or less than GND potential on any terminal except VREF and RFEEDBACK. NOTE: 1. θJA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications V+ = +15V, VREF = +10V, TA = 25 oC Unless Otherwise Specified PARAMETER TEST CONDITIONS AD7520/AD7530 AD7521/AD7531 UNITS MIN TYP MAX MIN TYP MAX SYSTEM PERFORMANCE (Note 2) Resolution 10 10 10 12 12 12 Bits Nonlinearity J, S S Over -55oC to 125oC (Notes 2, 5) (Figure 3) -- ±0.2 (8-Bit) -- ±0.2 (8-Bit) % of FSR K T Over -55oC to 125oC (Figure 2) -- ±0.1 (9-Bit) -- ±0.1 (9-Bit) % of FSR L, U -10V ≤ VREF ≤ +10V U Over -55oC to 125oC (Figure 2) -- ±0.05 (10-Bit) -- ±0.05 (10-Bit) % of FSR Nonlinearity Tempco -10V ≤ VREF ≤ +10V (Notes 3, 4) -- ±2- - ±2 ppm of FSR/oC Gain Error - ±0.3 - - ±0.3 - % of FSR Gain Error Tempco - - ±10 - - ±10 ppm of FSR/oC Output Leakage Current (Either Output) Over the Specified Temperature Range -- ±200 ( ±300) -- ±200 ( ±300) nA DYNAMIC CHARACTERISTICS Output Current Settling Time To 0.05% of FSR (All Digital Inputs Low To High And High To Low) (Note 4) (Figure 7) - 1.0 - - 1.0 - µs Feedthrough Error VREF = 20VP-P, 10kHz (50kHz) All Digital Inputs Low (Note 4) (Figure 6) - - 10 - - 10 mVP-P REFERENCE INPUT Input Resistance All Digital Inputs High IOUT1 at Ground 5 10 20 5 10 20 k Ω ANALOG OUTPUT Output Capacitance IOUT1 All Digital Inputs High (Note 4) (Figure 5) - 200 - - 200 - pF IOUT2 -75 - -75 - pF IOUT1 All Digital Inputs Low (Note 4) (Figure 5) -75 - -75 - pF IOUT2 - 200 - - 200 - pF AD7520, AD7530, AD7521, AD7531 |
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