Data Sheet

AD7656-1/AD7657-1/AD7658-1

Rev. D | Page 11 of 32

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

64 63 62

61

60 59 58

57 56 55 54 53 52 51 50 49

47

46

45

V5

42

V4

43

AGND

44

AGND

48

V6

41

40

39

V3

37

AGND

36

V2

35

34

33

V1

38

AGND

2

DB13

3

DB12

4

DB11

7

DB8/DOUT A

6

DB9/DOUT B

5

DB10/DOUT C

1

8

DGND

9

10

DB7/HBEN/DCEN

12

DB5/DCIN A

13

DB4/DCIN B

14

DB3/DCIN C

15

DB2/SEL C

16

DB1/SEL B

11

DB6/SCLK

17 18

19

20

21 22 23

24 25 26

27 28 29 30 31 32

PIN 1

AD7656-1/AD7657-1/AD7658-1

TOP VIEW

(Not to Scale)

Figure 3. Pin Configuration

Table 7. Pin Function Descriptions

Pin No.

Mnemonic

Description

54, 56, 58

REFCAPA, REFCAPB,

REFCAPC

Reference Capacitor A, Reference Capacitor B, and Reference Capacitor C. Decoupling capacitors are

connected to these pins to decouple the reference buffer for each ADC pair. Decouple each REFCAP pin

to AGND using a 1 µF capacitor.

33, 36, 39,

42, 45, 48

V1 to V6

Analog Input 1 to Analog Input 6. These pins are single-ended analog inputs. In hardware mode,

the analog input range of these channels is determined by the RANGE pin. In software mode, it is

determined by the RNGC to RNGA bits of the control register (see Table 11).

32, 37, 38, 43,

44, 49, 52, 53,

55, 57, 59

AGND

Analog Ground. This pin is the ground reference point for all analog circuitry on the AD7656-1/

AD7657-1/AD7658-1. Refer all analog input signals and external reference signals to this pin.

Connect all AGND pins to the AGND plane of the system. The AGND and DGND voltages should

ideally be at the same potential and must not be more than 0.3 V apart, even on a transient basis.

26

and must not be more than 0.3 V apart, even on a transient basis. Decouple this supply to DGND by

9

Logic Power Supply Input. The voltage supplied at this pin determines the operating voltage of the

interface. This pin is nominally at the same supply as the supply of the host interface.

8, 25

DGND

Digital Ground. This is the ground reference point for all digital circuitry on the AD7656-1/AD7657-1/

AD7658-1. Connect both DGND pins to the DGND plane of a system. The DGND and AGND voltages

should ideally be at the same potential and must not be more than 0.3 V apart, even on a transient

basis.

34, 35, 40,

41, 46, 47,

50, 60

on a transient basis.

21, 22, 23

CONVST C,

CONVST B, CONVST A

Conversion Start Input A, Conversion Start Input B, and Conversion Start Input C. These logic inputs

are used to initiate conversions on the ADC pairs. CONVST A is used to initiate simultaneous conversions

on V1 and V2. CONVST B is used to initiate simultaneous conversions on V3 and V4. CONVST C is

used to initiate simultaneous conversions on V5 and V6. When one of these pins switches from low

to high, the track-and-hold switch on the selected ADC pair switches from track to hold, and the

conversion is initiated. These inputs can also be used to place the ADC pairs into partial power-

down mode.