10

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999

Ordering Information

PART NUMBER

TEMPERATURE RANGE

SCREENING LEVEL

PACKAGE

HCTS109DMSR

Intersil Class S Equivalent

16 Lead SBDIP

HCTS109KMSR

Intersil Class S Equivalent

16 Lead Ceramic Flatpack

HCTS109D/Sample

Sample

16 Lead SBDIP

HCTS109K/Sample

Sample

16 Lead Ceramic Flatpack

HCTS109HMSR

Die

Die

HCTS109MS

Radiation Hardened

Dual JK Flip Flop

Pinouts

16 LEAD CERAMIC DUAL-IN-LINE

METAL SEAL PACKAGE (SBDIP)

MIL-STD-1835 CDIP2-T16, LEAD FINISH C

TOP VIEW

16 LEAD CERAMIC METAL SEAL

FLATPACK PACKAGE (FLATPACK)

MIL-STD-1835 CDFP4-F16, LEAD FINISH C

TOP VIEW

14

15

16

9

13

12

11

10

1

2

3

4

5

7

6

8

RI

J1

K1

CP1

S1

Q1

GND

Q1

VCC

J2

K2

CP2

S2

Q2

Q2

R2

R1

J1

K1

CP1

S1

Q1

Q1

GND

2

3

4

5

6

7

8

116

15

14

13

12

11

10

9

VCC

R2

J2

K2

CP2

S2

Q2

Q2

Features

• 3 Micron Radiation Hardened SOS CMOS

• Total Dose 200K RAD (Si)

Bit-Day (Typ)

• Latch-Up Free Under Any Conditions

• Significant Power Reduction Compared to LSTTL ICs

• DC Operating Voltage Range: 4.5V to 5.5V

• LSTTL Input Logic Compatibility

- VIL = 0.8V Max

- VIH = VCC/2 Min

• Input Current Levels Ii

≤ 5µA at VOL, VOH

Description

The Intersil HCTS109MS is a Radiation Hardened Dual JK

Flip Flop with set and reset. The flip flop changes state with

the positive transition of the clock (CP1 or CP2).

The HCTS109MS utilizes advanced CMOS/SOS technology

to achieve high-speed operation. This device is a member of

radiation hardened, high-speed, CMOS/SOS Logic Family.

The HCTS109MS is supplied in a 16 lead Ceramic flatpack

(K suffix) or a SBDIP Package (D suffix).

September 1995

Spec Number

518601

File Number

2141.2