718

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

http://www.intersil.com or 407-727-9207

HCTS4002MS

Radiation Hardened

Dual 4-Input NOR Gate

Pinouts

14 LEAD CERAMIC DUAL-IN-LINE METAL SEAL

PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T14

TOP VIEW

14 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE

(FLATPACK) MIL-STD-1835 CDFP3-F14

TOP VIEW

Functional Diagram

TRUTH TABLE

INPUTS

OUTPUTS

An

Bn

Cn

Dn

Yn

LLLL

H

H

XXX

L

XHX

X

L

XX

H

X

L

XXX

H

L

NOTE: L = Logic Level Low, H = Logic level High,

X = Don’t Care

Y1

A1

B1

C1

D1

NC

GND

VCC

Y2

D2

C2

B2

A2

NC

1

2

3

4

5

6

7

14

13

12

11

10

9

8

14

13

12

11

10

9

8

2

3

4

5

6

7

1

Y1

A1

B1

C1

D1

NC

GND

VCC

Y2

D2

C2

B2

A2

NC

An

Bn

Yn

Cn

Dn

Features

• 3 Micron Radiation Hardened CMOS SOS

• Total Dose 200K RAD (Si)

(Typ)

• Latch-Up Free Under Any Conditions

• Significant Power Reduction Compared to LSTTL ICs

• DC Operating Voltage Range: 4.5V to 5.5V

• LSTTL Input Compatibility

- VIL = 0.8V Max

- VIH = VCC/2 Min

• Input Current Levels Ii

≤ 5µA at VOL, VOH

Description

The Intersil HCTS4002MS is a Radiation Hardened Dual 4-Input

NOR Gate. A high on any input forces the output to a low state.

The HCTS4002MS utilizes advanced CMOS/SOS technology to

achieve high-speed operation. This device is a member of

radiation hardened, high-speed, CMOS/SOS Logic Family.

The HCTS4002MS is supplied in a 14 lead Ceramic flatpack (K

suffix) or a SBDIP Package (D suffix).

Ordering Information

PART

NUMBER

TEMPERATURE

RANGE

SCREENING

LEVEL

PACKAGE

HCTS4002DMSR

Intersil Class

S Equivalent

14 Lead SBDIP

HCTS4002KMSR

Intersil Class

S Equivalent

14 Lead

Ceramic

Flatpack

HCTS4002D/

Sample

Sample

14 Lead SBDIP

HCTS4002K/

Sample

Sample

14 Lead

Ceramic

Flatpack

HCTS4002HMSR

Die

Die

August 1995

Spec Number

518632

File Number

3075.1