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HI5702 Datasheet(PDF) 5 Page - Intersil Corporation |
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HI5702 Datasheet(HTML) 5 Page - Intersil Corporation |
5 / 14 page 4-1509 Timing Waveforms NOTES: 1. SN: N-th sampling period. 2. HN: N-th holding period. 3. BM, N: M-th stage digital output corresponding to N-th sampled input. 4. DN: Final data output corresponding to N-th sampled input. FIGURE 8. HI5702 INTERNAL CIRCUIT TIMING FIGURE 9. INPUT-TO-OUTPUT TIMING DN - 7 DN - 6 DN - 2 DN - 1 DN DN + 1 ANALOG INPUT CLOCK INPUT INPUT S/H 1ST STAGE 2ND STAGE 10TH STAGE DATA UTPUT SN - 1 HN - 1 SN HN SN + 1 HN + 1 SN + 2 SN + 5 HN + 5 SN + 6 HN + 6 SN + 7 HN + 7 SN + 8 HN + 8 B1, N - 1 B1, N B1, N + 1 B1, N + 4 B1, N + 5 B1, N + 6 B1, N + 7 B2, N - 2 B2, N - 1 B2, N B2, N + 4 B2, N + 5 B2, N + 6 B10, N - 5 B10, N - 4 B10, N B10, N + 1 B10, N + 2 B10, N + 3 tLAT tOD tH DATA N - 1 DATA N CLOCK INPUT DATA OUTPUT 0.8V 2.0V 1.5V tAP ANALOG INPUT tAJ 1.5V HI5702 |
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