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ADF4157 Datasheet(PDF) 11 Page - Analog Devices

Part # ADF4157
Description  High Resolution 6 GHz Fractional-N Frequency Synthesizer
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADF4157 Datasheet(HTML) 11 Page - Analog Devices

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Data Sheet
ADF4157
Rev. D | Page 11 of 24
REGISTER MAPS
DB31
CONTROL
BITS
12-BIT MSB FRACTIONAL VALUE
(FRAC)
12-BIT INTEGER VALUE (INT)
MUXOUT
CONTROL
DB30 DB29 DB28 DB27 DB26 DB25 DB24 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
0
M4
M3
M2
M1
N12
N11
N10
N9
N8
N7
N6
N5
N4
N3
N2
N1
F25
F24
F23
F22
F21
F20
F19
F18
F17
F16
F15
F14 C3(0) C2(0) C1(0)
FRAC/INT REGISTER (R0)
DB31
CONTROL
BITS
RESERVED
13-BIT LSB FRACTIONAL VALUE
(FRAC) (DBB)
RESERVED
RESERVED
RESERVED
DB30 DB29 DB28 DB27 DB26 DB25 DB24 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
0
0
0
0
F13
F12
F11
F10
F9
F8
F7
F6
F5
F4
F3
F2
F1
0
0
0
0
0
0
0
0
0
0
0
0
C3(0) C2(0) C1(1)
LSB FRAC REGISTER (R1)
DB31
RESERVED
CONTROL
BITS
DB30 DB29 DB28 DB27 DB26 DB25 DB24 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
U12
0
0
0
0
0
0
U11
U10
U9
U8
U7
C3(0) C2(1) C1(1)
FUNCTION REGISTER (R3)
DB31
12-BIT CLOCK DIVIDER VALUE
CONTROL
BITS
DB30 DB29 DB28 DB27 DB26 DB25 DB24 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
0
0
0
0
0
0
0
NB2 NB1
0
0
C2
C1
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
C3(1) C2(0) C1(0)
TEST REGISTER (R4)
NOTES
1. DBB = DOUBLE BUFFERED BIT(S).
DB31
RESERVED
5-BIT R COUNTER
CURRENT
SETTING
CONTROL
BITS
DB30 DB29 DB28 DB27 DB26 DB25 DB24 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
0
0
0
C1
CPI4 CPI3 CPI2 CPI1
0
P1
U2
U1
R5
R4
R3
R2
R1
0
0
0
0
0
0
0
0
0
0
0
0
C3(0) C2(1) C1(0)
R DIVIDER REGISTER (R2)
DBB
DBB
RESERVED
CLK
DIV
MODE
0
0
0
0
Figure 16. Register Summary


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