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HI7188 Datasheet(PDF) 9 Page - Intersil Corporation

Part # HI7188
Description  8-Channel, 16-Bit, High Precision, Sigma-Delta A/D Sub-System
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

HI7188 Datasheet(HTML) 9 Page - Intersil Corporation

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Definitions
Integral Non-Linearity (INL) - This is the maximum devia-
tion of any digital code from a straight line passing through the
endpoints of the transfer function. The endpoints of the trans-
fer function are zero scale (a point 0.5 LSB below the first
code transition 000...000 and 000...001) and full scale (a point
0.5 LSB above the last code transition 111...110 to 111...111).
Differential Non-Linearity (DNL) - This is the deviation
from the actual difference between midpoints and the ideal
difference between midpoints (1 LSB) for adjacent codes. If
this difference is equal to or more negative than 1 LSB, a
code will be missed.
Offset Error (VOS) - The offset error is the deviation of the first
code transition from the ideal input voltage (VIN - 0.5 LSB).
Full Scale Error (FSE) - The full scale error is the deviation
of the last code transition from the ideal input full-scale volt-
age (VIN- + VREF/Gain - 1.5 LSB).
Input Span - The input span defines the minimum and max-
imum input voltages the device can handle while still cali-
brating properly for gain.
End of Scan (EOS) - The end of scan is a signal used to
indicate all active logical channels have been converted and
data is available to be read.
Line Noise Rejection - Line noise rejection is the ability to
attenuate (reject) signals at the frequency of power lines typ-
ically 50Hz or 60Hz.
Physical/Logical Channel - A physical channel pertains to
channels which are directly connected to the device package
pins identified in the pinout. Logical channels are predefined
in the Channel Configuration Registers (CCR) with a physical
channels reference (address) being made by the user. Refer
to the Channel Configuration Registers section for examples.
FIGURE 5. DATA READ FROM HI7188
FIGURE 6. DATA READ FROM HI7188
Waveforms (Continued)
CS
SCLK
SDIO
SDO
tACC
tDV
1ST BIT
2ND BIT
SCLK
CS
EOS
SDIO
tEOS
8
7
6
5
1
HI7188


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