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HIP0082AS1 Datasheet(PDF) 8 Page - Intersil Corporation |
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HIP0082AS1 Datasheet(HTML) 8 Page - Intersil Corporation |
8 / 12 page 8 There is no need in normal operation to read the Direct Comparator output bits, except to directly read the fault state when CS goes low or to cross-check on the filtered OL and SG fault data. If the Direct Comparator data is ignored, then only 16 bits of SPI data is read. In this case the last 3 bits in the 16 bit sequence is the first 3 bits of Direct Comparator data which can be ignored. Data read from a SPI interface starts with the first clock pulse. The CS and R/W inputs cannot be changed while reading data from the shift register. And, as noted, an inter- nal low on the shift register input causes low data bits to fol- low the 21 bits of diagnostic data. While the Write/Store operation calls for 6 bits of data, a SPI write will output 8 bits. The first 2 bits transmitted should be dummy bits. The 3-bit is the Test bit which should be low for normal operation. The Test bit is used to facilitate testing in the manufacturing process and is not recommended for other use. The 6 programmable bits are described in the section on Diagnostic Write Operation. Pin Descriptions VCC and GND - 5V Supply and Ground connections. A charge pump is used to boost the Power MOSFET gate drive. This allows a single 5V supply to satisfy all logic and drive requirements. OUT1 - OUT4 - Low-side output drivers with 0.62 Ω (OUT1 and OUT2) or 0.57 Ω (OUT3 and OUT4) on resistance. The outputs are provided with over current shutdown and over voltage clamping. Additionally, open-load and short-to- ground detection is carried out when the outputs are ON. IN1 - IN4 - Active-low CMOS logic inputs which control the output stages OUT1 - OUT4. These inputs are provided with pull-up resistors. RST - Active-low logic-level reset input with internal pull-up resistor. CLK - Clock input for synchronous serial interface with inter- nal pull-up resistor. This input must be high when CS transi- tions from high to low. CS - Active-low chip select input for serial interface. This input has an internal pull-up resistor. R/W - Read/write control pin for serial interface. This input controls whether the TXD pin is an input or output. This input has an internal pull-up resistor. TXD - Bidirectional data pin for serial interface. When R/Wis high diagnostic data can be read from HIP0082. When R/W is low, 6 bits may be written to the internal program register. FIGURE 2. SERIAL INTERFACE TIMING DIAGRAM CLK CS R/W TXD fCLK tCLKL tCLKH ZZZZZ ZZ tCSLDV tRWLCLK tCSLCLK tRWLDZ tDVCLKL tRWHDV tpCLKD tRWHCLK tCSHDZ tCLKCSH ZZ = HIGH IMPEDANCE FIGURE 3. SERIAL INTERFACE WRITE OPERATION CS R/W TXD ZZZZ FSB T d_OL1 T d_OL2 T d_OL3 T d_OL4 TEST ISC ZZZZ CLK HIP0082, HIP0084 |
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