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HIP6021EVAL1 Datasheet(PDF) 9 Page - Intersil Corporation |
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HIP6021EVAL1 Datasheet(HTML) 9 Page - Intersil Corporation |
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9 / 16 page  9 for the linear controllers is that they monitor the VSEN pins for under-voltage events. Should excessive currents cause the voltage at the VSEN pins to fall below the linear under- voltage threshold, the LUV signal sets the over-current latch if CSS is fully charged. Blanking the LUV signal during the CSS charge interval allows the linear outputs to build above the under-voltage threshold during normal operation. Cycling the bias input power off then on resets the counter and the fault latch. A resistor (ROCSET) programs the over-current trip level for the PWM converter. As shown in Figure 5, the internal 200 µA current sink, IOCSET develops a voltage across ROCSET (VSET) that is referenced to VIN. The DRIVE signal enables the over-current comparator (OVER- CURRENT). When the voltage across the upper MOSFET (VDS) exceeds VSET, the over-current comparator trips to set the over-current latch. Both VSET and VDS are referenced to VIN and a small capacitor across ROCSET helps VOCSET track the variations of VIN due to MOSFET switching. The over-current function will trip at a peak inductor current (IPEAK) determined by: The OC trip point varies with MOSFET’s rDS(ON) temperature variations. To avoid over-current tripping in the normal operating load range, determine the ROCSET resistor from the equation above with: 1. The maximum rDS(ON) at the highest junction temperature. 2. The minimum IOCSET from the specification table. 3. Determine IPEAK for IPEAK >IOUT(MAX) +(∆I)/2, where ∆I is the output inductor ripple current. For an equation for the ripple current see the section under component guidelines titled ‘PWM Output Inductor Selection’. OUT1 Voltage Program The output voltage of the PWM converter is programmed to discrete levels between 1.3VDC and 3.5VDC. This output (OUT1) is designed to supply the core voltage of Intel’s advanced microprocessors. The voltage identification (VID) pins program an internal voltage reference (DACOUT) with a TTL-compatible 5-bit digital-to-analog converter. The level of DACOUT also sets the PGOOD and OVP thresholds. Table 1 specifies the DACOUT voltage for the different combinations of connections on the VID pins. The VID pins can be left open for a logic 1 input, because they are internally pulled up to an internal voltage of about 5V by a 10 µA current source. Changing the VID inputs during operation is not recommended and could toggle the PGOOD signal and exercise the over-voltage protection. 0A 0V 2V 4V FIGURE 4. OVER-CURRENT OPERATION TIME T1 T2 T3 T0 T4 0V 10V OVERLOAD APPLIED FAULT REPORTED COUNT = 1 COUNT = 2 COUNT = 3 I PEAK = I OCSET R OCSET × r DS ON () ---------------------------------------------------- UGATE OCSET PHASE OVER- CURRENT + - GATE CONTROL VCC OC 200 µA VDS iD VSET ROCSET VIN = +5V OVER-CURRENT TRIP: IOCSET + + FIGURE 5. OVER-CURRENT DETECTION PWM DRIVE i D r DS ON () × I OCSET R OCSET × > V DS V SET > V PHASE V IN V DS – = V OCSET V IN V SET – = HIP6021A |
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