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ICM7232 Datasheet(PDF) 5 Page - Intersil Corporation |
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ICM7232 Datasheet(HTML) 5 Page - Intersil Corporation |
5 / 16 page 9-23 Absolute Maximum Ratings Thermal Information Supply Voltage (VDD - VSS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.5V Input Voltage (Note 1). . . . . . . . . . . . . . . . . . . . VSS - 0.3 ≤ VIN ≤ 6.5 Display Voltage (Note 1) . . . . . . . . . . . . . . . . . . . .0.3 ≤ VDISP ≤ +0.3 Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -25oC to 85oC Thermal Resistance (Typical, Note 2) θJA (oC/W) θJC (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . 60 N/A CERDIP Package . . . . . . . . . . . . . . . . 50 12 Maximum Junction Temperature Ceramic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175oC Plastic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC Maximum Lead Temperature (Soldering, 10s) . . . . . . . . . . . . 300oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. Due to the SCR structure inherent in these devices, connecting any display terminal or the display voltage terminal to a voltage outside the power supply to the chip may cause destructive device latchup. The digital inputs should never be connected to a voltage less than -0.3V below ground, but maybe connected to voltages above VDD but not more than 6.5V above VSS. 2. θJA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications V+ = 5V +10%, VSS = 0V, TA = -25 oC to 85oC, Unless Otherwise Specified PARAMETER TEST CONDITIONS MIN TYP MAX UNITS Power Supply Voltage, VDD 4.5 >4 5.5 V Data Retention Supply Voltage, VDD Guaranteed Retention at 2V 2 1.6 - V Logic Supply Current, IDD Current from VDD to Ground Excluding Display. VDISP = 2V - 30 100 µA Shutdown Total Current, IS VDISP Pin 2 Open - 1 10 µA Display Voltage Range, VDISP VSS ≤ VDISP ≤ VDD 0- VDD V Display Voltage Setup Current, IDISP VDISP = 2V, Current from VDD to VDISP On-Chip - 15 30 µA Display Voltage Setup Resistor Value, RDISP One of Three Identical Resistors in String 40 75 - k Ω DC Component of Display Signals (Sample Test Only) - 1/ 4 1%(VDD-VDISP) Display Frame Rate, fDISP See Figure 5 60 90 120 Hz Input Low Level, VIL ICM7231, Pins 30 - 35, 37 - 39, 1 ICM7232, Pins 1, 38, 39 (Note 2) - - 0.8 V Input High Level, VIH 2.0 - - V Input Leakage, IILK - 0.1 1 µA Input Capacitance, CIN -5- pF Output Low Level, VOL Pin 37, ICM7232, IOL = 1mA - - 0.4 V Output High Level, VOH VDD = 4.5V, IOH = -500µA 4.1 - - V Operating Temperature Range, TOP Industrial Range -25 - +85 oC AC Specifications VDD = 5V +10% VSS = 0V, -25 oC to 85oC PARAMETER TEST CONDITIONS MIN TYP MAX UNITS PARALLEL INPUT (ICM7231) See Figure 1 Chip Select Pulse Width, tCS (Note 1) 500 350 - ns Address/Data Setup Time, tDS (Note 1) 200 - - ns Address/Data Hold Time, tDH (Note 1) 0 -20 - ns Inter-Chip Select Time, tICS (Note 1) 3 - - µs SERIAL INPUT (ICM7232) See Figures 2, 3 Data Clock Low Time, tCL (Note 1) 350 - - ns Data Clock High Time, tCL (Note 1) 350 - - ns Data Setup Time, tDS (Note 1) 200 - - ns Data Hold Time, tDH (Note 1) 0 -20 - ns Write Pulse Width, tWP (Note 1) 500 350 - ns Write Pulse to Clock at Initialization, tWLL (Note 1) 1.5 - - µs Data Accepted Low Output Delay, tODL (Note 1) - 200 400 ns Data Accepted High Output Delay, tODH (Note 1) - 1.5 3 µs Write Delay After Last Clock, tCWS (Note 1) 350 - - ns ICM7231, ICM7232 |
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